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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-14 18:26:31 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-14 18:26:31 +0000 |
| commit | 2661c50173d4dbbb07610c48a96b0e5503af5f19 (patch) | |
| tree | f18a0e4aa4d942e058a1dd68ca68c290f0825b91 | |
| parent | 92aecc9e3c7a18d3dcae6da0908a364c61eda7f3 (diff) | |
| download | bcm5719-llvm-2661c50173d4dbbb07610c48a96b0e5503af5f19.tar.gz bcm5719-llvm-2661c50173d4dbbb07610c48a96b0e5503af5f19.zip | |
Make sure MTSPR instruction is inserted into the BasicBlock
llvm-svn: 14822
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp b/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp index c986ca4afd3..10a19b55246 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -1437,7 +1437,7 @@ void ISel::visitCallInst(CallInst &CI) { TheCall = BuildMI(PPC32::CALLpcrel, 1).addGlobalAddress(F, true); } else { // Emit an indirect call through the CTR unsigned Reg = getReg(CI.getCalledValue()); - BuildMI(PPC32::MTSPR, 2).addZImm(9).addReg(Reg); + BuildMI(BB, PPC32::MTSPR, 2).addZImm(9).addReg(Reg); TheCall = BuildMI(PPC32::CALLindirect, 1).addZImm(20).addZImm(0); } diff --git a/llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp b/llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp index c986ca4afd3..10a19b55246 100644 --- a/llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp +++ b/llvm/lib/Target/PowerPC/PowerPCISelSimple.cpp @@ -1437,7 +1437,7 @@ void ISel::visitCallInst(CallInst &CI) { TheCall = BuildMI(PPC32::CALLpcrel, 1).addGlobalAddress(F, true); } else { // Emit an indirect call through the CTR unsigned Reg = getReg(CI.getCalledValue()); - BuildMI(PPC32::MTSPR, 2).addZImm(9).addReg(Reg); + BuildMI(BB, PPC32::MTSPR, 2).addZImm(9).addReg(Reg); TheCall = BuildMI(PPC32::CALLindirect, 1).addZImm(20).addZImm(0); } |
