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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-11 19:32:27 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-07-11 19:32:27 +0000 |
| commit | 24cf4e36e591be7ec1e061fca810521bb5150d25 (patch) | |
| tree | bbc94390d7c019b0dd21aa64e5b90e6268fbda1a | |
| parent | 30cd11603927751258d75f1f1ea90577965017db (diff) | |
| download | bcm5719-llvm-24cf4e36e591be7ec1e061fca810521bb5150d25.tar.gz bcm5719-llvm-24cf4e36e591be7ec1e061fca810521bb5150d25.zip | |
Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.
llvm-svn: 160064
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 19 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.h | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/selectcc.ll | 25 |
3 files changed, 42 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 6858d84f08b..6b80e3fe3e1 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -152,6 +152,8 @@ MipsTargetLowering(MipsTargetMachine &TM) setOperationAction(ISD::SELECT, MVT::f32, Custom); setOperationAction(ISD::SELECT, MVT::f64, Custom); setOperationAction(ISD::SELECT, MVT::i32, Custom); + setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); + setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); setOperationAction(ISD::SETCC, MVT::f32, Custom); setOperationAction(ISD::SETCC, MVT::f64, Custom); setOperationAction(ISD::BRCOND, MVT::Other, Custom); @@ -263,9 +265,6 @@ MipsTargetLowering(MipsTargetMachine &TM) setInsertFencesForAtomic(true); - if (Subtarget->isSingleFloat()) - setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); - if (!Subtarget->hasSEInReg()) { setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); @@ -801,6 +800,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); case ISD::JumpTable: return LowerJumpTable(Op, DAG); case ISD::SELECT: return LowerSELECT(Op, DAG); + case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); case ISD::SETCC: return LowerSETCC(Op, DAG); case ISD::VASTART: return LowerVASTART(Op, DAG); case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); @@ -1576,6 +1576,19 @@ LowerSELECT(SDValue Op, SelectionDAG &DAG) const Op.getDebugLoc()); } +SDValue MipsTargetLowering:: +LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const +{ + DebugLoc DL = Op.getDebugLoc(); + EVT Ty = Op.getOperand(0).getValueType(); + SDValue Cond = DAG.getNode(ISD::SETCC, DL, getSetCCResultType(Ty), + Op.getOperand(0), Op.getOperand(1), + Op.getOperand(4)); + + return DAG.getNode(ISD::SELECT, DL, Op.getValueType(), Cond, Op.getOperand(2), + Op.getOperand(3)); +} + SDValue MipsTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { SDValue Cond = CreateFPCmp(DAG, Op); diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h index c8b96acc1b3..edab03cdd8d 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.h +++ b/llvm/lib/Target/Mips/MipsISelLowering.h @@ -138,6 +138,7 @@ namespace llvm { SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const; SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const; diff --git a/llvm/test/CodeGen/Mips/selectcc.ll b/llvm/test/CodeGen/Mips/selectcc.ll new file mode 100644 index 00000000000..d7d674b2100 --- /dev/null +++ b/llvm/test/CodeGen/Mips/selectcc.ll @@ -0,0 +1,25 @@ +; RUN: llc -march=mipsel < %s + +@gd0 = external global double +@gd1 = external global double + +define double @select_cc_f32(float %a, float %b) nounwind { +entry: + store double 0.000000e+00, double* @gd0, align 8 + store double 1.000000e+00, double* @gd1, align 8 + %cmp = fcmp olt float %a, %b + %conv = zext i1 %cmp to i32 + %conv1 = sitofp i32 %conv to double + ret double %conv1 +} + +define double @select_cc_f64(double %a, double %b) nounwind { +entry: + store double 0.000000e+00, double* @gd0, align 8 + store double 1.000000e+00, double* @gd1, align 8 + %cmp = fcmp olt double %a, %b + %conv = zext i1 %cmp to i32 + %conv1 = sitofp i32 %conv to double + ret double %conv1 +} + |
