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| author | Jim Grosbach <grosbach@apple.com> | 2009-12-11 20:29:53 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-12-11 20:29:53 +0000 |
| commit | 22a4ea8690352ce82fe754e1550da86f07cf626a (patch) | |
| tree | f3382cd280e9db64ed056e47f6614e5a8c94d86d | |
| parent | 75c9b97123aca74397c9ead7d8d62ba406dec48d (diff) | |
| download | bcm5719-llvm-22a4ea8690352ce82fe754e1550da86f07cf626a.tar.gz bcm5719-llvm-22a4ea8690352ce82fe754e1550da86f07cf626a.zip | |
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
llvm-svn: 91150
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 406264b1483..786dcfff053 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1574,7 +1574,7 @@ def MOVCCi : AI1<0b1101, (outs GPR:$dst), // // memory barriers protect the atomic sequences -let isPredicable = 0 in { +let isPredicable = 0, hasSideEffects = 1 in { def Int_MemBarrierV7 : AI<(outs), (ins), Pseudo, NoItinerary, "dmb", "", |
