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author | Dan Gohman <gohman@apple.com> | 2008-10-17 21:39:27 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-10-17 21:39:27 +0000 |
commit | 209fc264624efef46b89666a5e1f856f3418627d (patch) | |
tree | f06e54364ac9f99948a085537fbbe384ed040fbf | |
parent | b1d8d6ecff8240758a1a6a7a6b8d2f167240e0d8 (diff) | |
download | bcm5719-llvm-209fc264624efef46b89666a5e1f856f3418627d.tar.gz bcm5719-llvm-209fc264624efef46b89666a5e1f856f3418627d.zip |
This is now partly done.
llvm-svn: 57734
-rw-r--r-- | llvm/lib/Target/README.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/README.txt b/llvm/lib/Target/README.txt index 93e8c54979d..9ff4b5b337a 100644 --- a/llvm/lib/Target/README.txt +++ b/llvm/lib/Target/README.txt @@ -799,7 +799,7 @@ unsigned long long f6(unsigned long long x, unsigned long long y, int z) { } } -On X86-64, we only handle f3/f4 right. On x86-32, several of these +On X86-64, we only handle f2/f3/f4 right. On x86-32, a few of these generate truly horrible code, instead of using shld and friends. On ARM, we end up with calls to L___lshrdi3/L___ashldi3 in f, which is badness. PPC64 misses f, f5 and f6. CellSPU aborts in isel. |