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authorCraig Topper <craig.topper@intel.com>2019-04-19 05:48:09 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-19 05:48:09 +0000
commit2099ccbe1ffbc0a71fef992ad8ad15164c450cc0 (patch)
tree26f351d532632728d045041517c5e00f002104c4
parentf73caae956a675c3fa2358b3ade7e67850064d2a (diff)
downloadbcm5719-llvm-2099ccbe1ffbc0a71fef992ad8ad15164c450cc0.tar.gz
bcm5719-llvm-2099ccbe1ffbc0a71fef992ad8ad15164c450cc0.zip
[X86] Add test cases for turning (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) when the AND could match to a movzx.
We already reorder when C1 >> C2 would allow a smaller immediate encoding. llvm-svn: 358736
-rw-r--r--llvm/test/CodeGen/X86/narrow-shl-cst.ll59
1 files changed, 59 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/narrow-shl-cst.ll b/llvm/test/CodeGen/X86/narrow-shl-cst.ll
index 782fe22c2f4..0100a8ce772 100644
--- a/llvm/test/CodeGen/X86/narrow-shl-cst.ll
+++ b/llvm/test/CodeGen/X86/narrow-shl-cst.ll
@@ -197,3 +197,62 @@ define i64 @test16(i64 %x, i64* %y) nounwind {
%shl = xor i64 %xor, 1095216660480
ret i64 %shl
}
+
+define i32 @test17(i32 %x) nounwind {
+; CHECK-LABEL: test17:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: shll $10, %eax
+; CHECK-NEXT: andl $261120, %eax # imm = 0x3FC00
+; CHECK-NEXT: retq
+ %and = shl i32 %x, 10
+ %shl = and i32 %and, 261120
+ ret i32 %shl
+}
+
+define i64 @test18(i64 %x) nounwind {
+; CHECK-LABEL: test18:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: shll $10, %eax
+; CHECK-NEXT: andl $261120, %eax # imm = 0x3FC00
+; CHECK-NEXT: retq
+ %and = shl i64 %x, 10
+ %shl = and i64 %and, 261120
+ ret i64 %shl
+}
+
+define i32 @test19(i32 %x) nounwind {
+; CHECK-LABEL: test19:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: shll $10, %eax
+; CHECK-NEXT: andl $67107840, %eax # imm = 0x3FFFC00
+; CHECK-NEXT: retq
+ %and = shl i32 %x, 10
+ %shl = and i32 %and, 67107840
+ ret i32 %shl
+}
+
+define i64 @test20(i64 %x) nounwind {
+; CHECK-LABEL: test20:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: shll $10, %eax
+; CHECK-NEXT: andl $67107840, %eax # imm = 0x3FFFC00
+; CHECK-NEXT: retq
+ %and = shl i64 %x, 10
+ %shl = and i64 %and, 67107840
+ ret i64 %shl
+}
+
+define i64 @test21(i64 %x) nounwind {
+; CHECK-LABEL: test21:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: shlq $10, %rax
+; CHECK-NEXT: retq
+ %and = shl i64 %x, 10
+ %shl = and i64 %and, 4398046510080
+ ret i64 %shl
+}
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