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authorSanjay Patel <spatel@rotateright.com>2019-07-13 12:04:52 +0000
committerSanjay Patel <spatel@rotateright.com>2019-07-13 12:04:52 +0000
commit2097f75eabb94c7eafcfba9cbfd6b60f08a4ded6 (patch)
tree6808be95f2c6fb6695ce2ad043f658d51590b85f
parent327db23b6642499fab917014a4c9934c1649e120 (diff)
downloadbcm5719-llvm-2097f75eabb94c7eafcfba9cbfd6b60f08a4ded6.tar.gz
bcm5719-llvm-2097f75eabb94c7eafcfba9cbfd6b60f08a4ded6.zip
[x86] simplify cmov with same true/false operands
llvm-svn: 365998
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
-rw-r--r--llvm/test/CodeGen/X86/combine-sbb.ll3
2 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 6b152fe9d7a..e0bcf702489 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36783,6 +36783,10 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
X86::CondCode CC = (X86::CondCode)N->getConstantOperandVal(2);
SDValue Cond = N->getOperand(3);
+ // cmov X, X, ?, ? --> X
+ if (TrueOp == FalseOp)
+ return TrueOp;
+
// Try to simplify the EFLAGS and condition code operands.
// We can't always do this as FCMOV only supports a subset of X86 cond.
if (SDValue Flags = combineSetCCEFLAGS(Cond, CC, DAG, Subtarget)) {
diff --git a/llvm/test/CodeGen/X86/combine-sbb.ll b/llvm/test/CodeGen/X86/combine-sbb.ll
index f9ac10755aa..9e68ab4beb1 100644
--- a/llvm/test/CodeGen/X86/combine-sbb.ll
+++ b/llvm/test/CodeGen/X86/combine-sbb.ll
@@ -291,9 +291,8 @@ define i32 @PR40483_sub5(i32*, i32) {
;
; X64-LABEL: PR40483_sub5:
; X64: # %bb.0:
-; X64-NEXT: xorl %eax, %eax
; X64-NEXT: subl %esi, (%rdi)
-; X64-NEXT: cmovael %eax, %eax
+; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
%3 = load i32, i32* %0, align 8
%4 = tail call { i8, i32 } @llvm.x86.subborrow.32(i8 0, i32 %3, i32 %1)
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