[X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.

llvm-svn: 294423

5 files changed, 17 insertions, 0 deletions

diff --git a/clang/docs/ClangCommandLineReference.rst b/clang/docs/ClangCommandLineReference.rst
index 4a65f7ff243..feafc7a3316 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -2203,6 +2203,8 @@ X86
 
 .. option:: -mrtm, -mno-rtm
 
+.. option:: -msgx, -mno-sgx
+
 .. option:: -msha, -mno-sha
 
 .. option:: -msse, -mno-sse
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 62bee0b4dd7..29fa617088d 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1719,6 +1719,7 @@ def mno_clflushopt : Flag<["-"], "mno-clflushopt">, Group<m_x86_Features_Group>;
 def mno_clwb : Flag<["-"], "mno-clwb">, Group<m_x86_Features_Group>;
 def mno_movbe : Flag<["-"], "mno-movbe">, Group<m_x86_Features_Group>;
 def mno_mpx : Flag<["-"], "mno-mpx">, Group<m_x86_Features_Group>;
+def mno_sgx : Flag<["-"], "mno-sgx">, Group<m_x86_Features_Group>;
 
 def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_arm_Features_Group>,
   HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64 only)">;
@@ -1915,6 +1916,7 @@ def mclflushopt : Flag<["-"], "mclflushopt">, Group<m_x86_Features_Group>;
 def mclwb : Flag<["-"], "mclwb">, Group<m_x86_Features_Group>;
 def mmovbe : Flag<["-"], "mmovbe">, Group<m_x86_Features_Group>;
 def mmpx : Flag<["-"], "mmpx">, Group<m_x86_Features_Group>;
+def msgx : Flag<["-"], "msgx">, Group<m_x86_Features_Group>;
 def mips16 : Flag<["-"], "mips16">, Group<m_Group>;
 def mno_mips16 : Flag<["-"], "mno-mips16">, Group<m_Group>;
 def mmicromips : Flag<["-"], "mmicromips">, Group<m_Group>;
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 6124bdb5fd9..527041a8665 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -3883,6 +3883,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
     Builder.defineMacro("__CLWB__");
   if (HasMPX)
     Builder.defineMacro("__MPX__");
+  if (HasSGX)
+    Builder.defineMacro("__SGX__");
 
   // Each case falls through to the previous one here.
   switch (SSELevel) {
diff --git a/clang/test/Driver/x86-target-features.c b/clang/test/Driver/x86-target-features.c
index 5d0c9faee74..79c409db1c0 100644
--- a/clang/test/Driver/x86-target-features.c
+++ b/clang/test/Driver/x86-target-features.c
@@ -69,3 +69,8 @@
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-mpx %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-MPX %s
 // MPX: "-target-feature" "+mpx"
 // NO-MPX: "-target-feature" "-mpx"
+
+// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -msgx %s -### -o %t.o 2>&1 | FileCheck -check-prefix=SGX %s
+// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-sgx %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-SGX %s
+// SGX: "-target-feature" "+sgx"
+// NO-SGX: "-target-feature" "-sgx"
diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c
index 0ead8eaefdc..9660244ccc5 100644
--- a/clang/test/Preprocessor/predefined-arch-macros.c
+++ b/clang/test/Preprocessor/predefined-arch-macros.c
@@ -662,6 +662,7 @@
 // CHECK_SKL_M32: #define __RDRND__ 1
 // CHECK_SKL_M32: #define __RDSEED__ 1
 // CHECK_SKL_M32: #define __RTM__ 1
+// CHECK_SKL_M32: #define __SGX__ 1
 // CHECK_SKL_M32: #define __SSE2__ 1
 // CHECK_SKL_M32: #define __SSE3__ 1
 // CHECK_SKL_M32: #define __SSE4_1__ 1
@@ -694,6 +695,7 @@
 // CHECK_SKL_M64: #define __RDRND__ 1
 // CHECK_SKL_M64: #define __RDSEED__ 1
 // CHECK_SKL_M64: #define __RTM__ 1
+// CHECK_SKL_M64: #define __SGX__ 1
 // CHECK_SKL_M64: #define __SSE2_MATH__ 1
 // CHECK_SKL_M64: #define __SSE2__ 1
 // CHECK_SKL_M64: #define __SSE3__ 1
@@ -808,6 +810,7 @@
 // CHECK_SKX_M32: #define __POPCNT__ 1
 // CHECK_SKX_M32: #define __RDRND__ 1
 // CHECK_SKX_M32: #define __RTM__ 1
+// CHECK_SKX_M32: #define __SGX__ 1
 // CHECK_SKX_M32: #define __SSE2__ 1
 // CHECK_SKX_M32: #define __SSE3__ 1
 // CHECK_SKX_M32: #define __SSE4_1__ 1
@@ -849,6 +852,7 @@
 // CHECK_SKX_M64: #define __POPCNT__ 1
 // CHECK_SKX_M64: #define __RDRND__ 1
 // CHECK_SKX_M64: #define __RTM__ 1
+// CHECK_SKX_M64: #define __SGX__ 1
 // CHECK_SKX_M64: #define __SSE2_MATH__ 1
 // CHECK_SKX_M64: #define __SSE2__ 1
 // CHECK_SKX_M64: #define __SSE3__ 1
@@ -894,6 +898,7 @@
 // CHECK_CNL_M32: #define __POPCNT__ 1
 // CHECK_CNL_M32: #define __RDRND__ 1
 // CHECK_CNL_M32: #define __RTM__ 1
+// CHECK_CNL_M32: #define __SGX__ 1
 // CHECK_CNL_M32: #define __SHA__ 1
 // CHECK_CNL_M32: #define __SSE2__ 1
 // CHECK_CNL_M32: #define __SSE3__ 1
@@ -934,6 +939,7 @@
 // CHECK_CNL_M64: #define __POPCNT__ 1
 // CHECK_CNL_M64: #define __RDRND__ 1
 // CHECK_CNL_M64: #define __RTM__ 1
+// CHECK_CNL_M64: #define __SGX__ 1
 // CHECK_CNL_M64: #define __SHA__ 1
 // CHECK_CNL_M64: #define __SSE2__ 1
 // CHECK_CNL_M64: #define __SSE3__ 1