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authorCraig Topper <craig.topper@intel.com>2019-04-11 18:40:08 +0000
committerCraig Topper <craig.topper@intel.com>2019-04-11 18:40:08 +0000
commit1fe5a9963de6a0df30af5d8eec685c9d8bbab5bf (patch)
tree2f1aaa48c095af2560fe441df3305cd1d1a660bd
parent1740c6e0da42b3745e68a24d2ef85ec4f66bd4f3 (diff)
downloadbcm5719-llvm-1fe5a9963de6a0df30af5d8eec685c9d8bbab5bf.tar.gz
bcm5719-llvm-1fe5a9963de6a0df30af5d8eec685c9d8bbab5bf.zip
[X86] Pre-commit i64 volatile test case for D60156. NFC
llvm-svn: 358210
-rw-r--r--llvm/test/CodeGen/X86/atomic-load-store-wide.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
index 2841b8ca344..d1b280661a3 100644
--- a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
+++ b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
@@ -90,3 +90,35 @@ define i64 @test3(i64* %ptr) noimplicitfloat {
%val = load atomic i64, i64* %ptr seq_cst, align 8
ret i64 %val
}
+
+define i64 @test4(i64* %ptr) {
+; SSE42-LABEL: test4:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
+; SSE42-NEXT: movd %xmm0, %eax
+; SSE42-NEXT: pextrd $1, %xmm0, %edx
+; SSE42-NEXT: retl
+;
+; NOSSE-LABEL: test4:
+; NOSSE: # %bb.0:
+; NOSSE-NEXT: pushl %ebx
+; NOSSE-NEXT: .cfi_def_cfa_offset 8
+; NOSSE-NEXT: pushl %esi
+; NOSSE-NEXT: .cfi_def_cfa_offset 12
+; NOSSE-NEXT: .cfi_offset %esi, -12
+; NOSSE-NEXT: .cfi_offset %ebx, -8
+; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
+; NOSSE-NEXT: xorl %eax, %eax
+; NOSSE-NEXT: xorl %edx, %edx
+; NOSSE-NEXT: xorl %ecx, %ecx
+; NOSSE-NEXT: xorl %ebx, %ebx
+; NOSSE-NEXT: lock cmpxchg8b (%esi)
+; NOSSE-NEXT: popl %esi
+; NOSSE-NEXT: .cfi_def_cfa_offset 8
+; NOSSE-NEXT: popl %ebx
+; NOSSE-NEXT: .cfi_def_cfa_offset 4
+; NOSSE-NEXT: retl
+ %val = load atomic volatile i64, i64* %ptr seq_cst, align 8
+ ret i64 %val
+}
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