Cleanup

llvm-svn: 57344

1 files changed, 12 insertions, 12 deletions

diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index d7aa08f8ca6..691f283b154 100644
--- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -44,15 +44,15 @@ public:
   bool SelectADDRrr(SDValue Op, SDValue N, SDValue &R1, SDValue &R2);
   bool SelectADDRri(SDValue Op, SDValue N, SDValue &Base,
                     SDValue &Offset);
-  
+
   /// InstructionSelect - This callback is invoked by
   /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
   virtual void InstructionSelect();
-  
+
   virtual const char *getPassName() const {
     return "SPARC DAG->DAG Pattern Instruction Selection";
-  } 
-  
+  }
+
   // Include the pieces autogenerated from the target description.
 #include "SparcGenDAGISel.inc"
 };
@@ -62,7 +62,7 @@ public:
 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
 void SparcDAGToDAGISel::InstructionSelect() {
   DEBUG(BB->dump());
-  
+
   // Select target instructions for the DAG.
   SelectRoot();
   CurDAG->RemoveDeadNodes();
@@ -78,11 +78,11 @@ bool SparcDAGToDAGISel::SelectADDRri(SDValue Op, SDValue Addr,
   if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
       Addr.getOpcode() == ISD::TargetGlobalAddress)
     return false;  // direct calls.
-  
+
   if (Addr.getOpcode() == ISD::ADD) {
     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
       if (Predicate_simm13(CN)) {
-        if (FrameIndexSDNode *FIN = 
+        if (FrameIndexSDNode *FIN =
                 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
           // Constant offset from frame ref.
           Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
@@ -115,7 +115,7 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDValue Op, SDValue Addr,
   if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
       Addr.getOpcode() == ISD::TargetGlobalAddress)
     return false;  // direct calls.
-  
+
   if (Addr.getOpcode() == ISD::ADD) {
     if (isa<ConstantSDNode>(Addr.getOperand(1)) &&
         Predicate_simm13(Addr.getOperand(1).getNode()))
@@ -147,7 +147,7 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
     SDValue DivRHS = N->getOperand(1);
     AddToISelQueue(DivLHS);
     AddToISelQueue(DivRHS);
-    
+
     // Set the Y register to the high-part.
     SDValue TopPart;
     if (N->getOpcode() == ISD::SDIV) {
@@ -163,7 +163,7 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
     unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr;
     return CurDAG->SelectNodeTo(N, Opcode, MVT::i32, DivLHS, DivRHS,
                                 TopPart);
-  }    
+  }
   case ISD::MULHU:
   case ISD::MULHS: {
     // FIXME: Handle mul by immediate.
@@ -179,12 +179,12 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
     return NULL;
   }
   }
-  
+
   return SelectCode(Op);
 }
 
 
-/// createSparcISelDag - This pass converts a legalized DAG into a 
+/// createSparcISelDag - This pass converts a legalized DAG into a
 /// SPARC-specific DAG, ready for instruction scheduling.
 ///
 FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {