diff options
| author | Andrzej Warzynski <andrzej.warzynski@arm.com> | 2019-12-11 08:58:01 +0000 |
|---|---|---|
| committer | Andrzej Warzynski <andrzej.warzynski@arm.com> | 2019-12-11 09:48:48 +0000 |
| commit | 1eecbda0872832da936d37c4288eaaa2645a7415 (patch) | |
| tree | 91697aff08c83992985e254754e1e8bfe92a37de | |
| parent | 1408e7e17525287c596a8f575957aecb684fa75d (diff) | |
| download | bcm5719-llvm-1eecbda0872832da936d37c4288eaaa2645a7415.tar.gz bcm5719-llvm-1eecbda0872832da936d37c4288eaaa2645a7415.zip | |
[AArch64][SVE] Move TableGen class definitions for gather loads (NFC)
Move 2 intrinsic class definitions so that they're all clustered in
one place.
Patch submitted to test commit access.
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsAArch64.td | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td index 9ece6c548d9..1cd39d6e351 100644 --- a/llvm/include/llvm/IR/IntrinsicsAArch64.td +++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td @@ -959,15 +959,6 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.". llvm_i32_ty], [IntrNoMem]>; -class AdvSIMD_GatherLoad_64bitOffset_Intrinsic - : Intrinsic<[llvm_anyvector_ty], - [ - LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, - LLVMPointerToElt<0>, - LLVMScalarOrSameVectorWidth<0, llvm_i64_ty> - ], - [IntrReadMem, IntrArgMemOnly]>; - class SVE2_3VectorArg_Long_Intrinsic : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, @@ -987,14 +978,6 @@ class AdvSIMD_GatherLoad_64bitOffset_Intrinsic // to reuse currently identical class definitions. class AdvSIMD_SVE_LOGB_Intrinsic : AdvSIMD_SVE_CNT_Intrinsic; -class AdvSIMD_GatherLoad_32bitOffset_Intrinsic - : Intrinsic<[ llvm_anyvector_ty ], - [ - LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, - LLVMPointerToElt<0>, llvm_anyvector_ty - ], - [ IntrReadMem, IntrArgMemOnly ]>; - // This class of intrinsics are not intended to be useful within LLVM IR but // are instead here to support some of the more regid parts of the ACLE. class Builtin_SVCVT<string name, LLVMType OUT, LLVMType IN> @@ -1024,6 +1007,23 @@ class AdvSIMD_SVE_WHILE_Intrinsic [llvm_anyint_ty, LLVMMatchType<1>], [IntrNoMem]>; +class AdvSIMD_GatherLoad_64bitOffset_Intrinsic + : Intrinsic<[llvm_anyvector_ty], + [ + LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, + LLVMPointerToElt<0>, + LLVMScalarOrSameVectorWidth<0, llvm_i64_ty> + ], + [IntrReadMem, IntrArgMemOnly]>; + +class AdvSIMD_GatherLoad_32bitOffset_Intrinsic + : Intrinsic<[llvm_anyvector_ty], + [ + LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, + LLVMPointerToElt<0>, llvm_anyvector_ty + ], + [IntrReadMem, IntrArgMemOnly]>; + class AdvSIMD_GatherLoad_VecTorBase_Intrinsic : Intrinsic<[llvm_anyvector_ty], [ |
