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authorBill Wendling <isanbard@gmail.com>2008-05-12 20:54:26 +0000
committerBill Wendling <isanbard@gmail.com>2008-05-12 20:54:26 +0000
commit1e11768a4f9a9c3e0ea43d0271ab476bbc3d0331 (patch)
tree7adf2e272b1f83ae4d8593aa6c841fcf73c5911e
parentd875c3e2fd7e058d4767dff09f5f6a61f659196d (diff)
downloadbcm5719-llvm-1e11768a4f9a9c3e0ea43d0271ab476bbc3d0331.tar.gz
bcm5719-llvm-1e11768a4f9a9c3e0ea43d0271ab476bbc3d0331.zip
Constify the machine instruction passed into the
"is{Trivially,Really}ReMaterializable" methods. llvm-svn: 51001
-rw-r--r--llvm/include/llvm/Target/TargetInstrInfo.h4
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp3
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.h2
3 files changed, 5 insertions, 4 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h
index ca35fa7850c..f9fd6ab30d8 100644
--- a/llvm/include/llvm/Target/TargetInstrInfo.h
+++ b/llvm/include/llvm/Target/TargetInstrInfo.h
@@ -67,7 +67,7 @@ public:
/// isTriviallyReMaterializable - Return true if the instruction is trivially
/// rematerializable, meaning it has no side effects and requires no operands
/// that aren't always available.
- bool isTriviallyReMaterializable(MachineInstr *MI) const {
+ bool isTriviallyReMaterializable(const MachineInstr *MI) const {
return MI->getDesc().isRematerializable() &&
isReallyTriviallyReMaterializable(MI);
}
@@ -81,7 +81,7 @@ protected:
/// return false if the instruction has any side effects other than
/// producing a value, or if it requres any address registers that are not
/// always available.
- virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const {
+ virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
return true;
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 8b31f5d5f09..d2c5abe6d63 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -760,7 +760,8 @@ static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) {
return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
-bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
+bool
+X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
switch (MI->getOpcode()) {
default: break;
case X86::MOV8rm:
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 5f09241f165..06080b74af4 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -260,7 +260,7 @@ public:
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
- bool isReallyTriviallyReMaterializable(MachineInstr *MI) const;
+ bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const;
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, const MachineInstr *Orig) const;
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