diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2011-03-24 01:07:26 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-03-24 01:07:26 +0000 |
| commit | 1de8cc6f95061bdecdb2da268b89ed6ed0c2bd2c (patch) | |
| tree | 98e80f86b5a0a3142836185928e3dff5aa5fe0bb | |
| parent | 98766db7858379f61d24d5d93b1b7be39fda0913 (diff) | |
| download | bcm5719-llvm-1de8cc6f95061bdecdb2da268b89ed6ed0c2bd2c.tar.gz bcm5719-llvm-1de8cc6f95061bdecdb2da268b89ed6ed0c2bd2c.zip | |
STRT and STRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.
llvm-svn: 128189
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/arm-tests.txt | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index d18c0ee1a55..9d09a65da41 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1805,7 +1805,7 @@ def STRD_POST: AI3stdpo<(outs GPR:$base_wb), def STRT : AI2stridx<0, 0, (outs GPR:$Rn_wb), (ins GPR:$Rt, GPR:$Rn,am2offset:$offset), - IndexModeNone, StFrm, IIC_iStore_ru, + IndexModePost, StFrm, IIC_iStore_ru, "strt", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", [/* For disassembly only; pattern left blank */]> { let Inst{21} = 1; // overwrite @@ -1813,7 +1813,7 @@ def STRT : AI2stridx<0, 0, (outs GPR:$Rn_wb), def STRBT : AI2stridx<1, 0, (outs GPR:$Rn_wb), (ins GPR:$Rt, GPR:$Rn, am2offset:$offset), - IndexModeNone, StFrm, IIC_iStore_bh_ru, + IndexModePost, StFrm, IIC_iStore_bh_ru, "strbt", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", [/* For disassembly only; pattern left blank */]> { let Inst{21} = 1; // overwrite diff --git a/llvm/test/MC/Disassembler/ARM/arm-tests.txt b/llvm/test/MC/Disassembler/ARM/arm-tests.txt index c4deed805e4..eace5ab7bf4 100644 --- a/llvm/test/MC/Disassembler/ARM/arm-tests.txt +++ b/llvm/test/MC/Disassembler/ARM/arm-tests.txt @@ -172,3 +172,6 @@ # CHECK: vldmdb r2, {s7, s8, s9, s10, s11} 0x05 0x3a 0x52 0xed + +# CHECK: strtvc r5, [r3], r0, lsr #20 +0x30 0x5a 0xa3 0x76 |
