diff options
author | Alex Bradbury <asb@lowrisc.org> | 2018-10-03 22:53:25 +0000 |
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committer | Alex Bradbury <asb@lowrisc.org> | 2018-10-03 22:53:25 +0000 |
commit | 1dbfdeb6e5b0538559aa706abe670a3ab295af43 (patch) | |
tree | 53a578827844bc128003163dab7b44a03b6f0d5b | |
parent | 31f81399bd4cda72164dbda9631dbfb2e8f3c11d (diff) | |
download | bcm5719-llvm-1dbfdeb6e5b0538559aa706abe670a3ab295af43.tar.gz bcm5719-llvm-1dbfdeb6e5b0538559aa706abe670a3ab295af43.zip |
[RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISelLowering
There was some duplicated logic for using the LocInfo of a CCValAssign in
order to convert from the ValVT to LocVT or vice versa. Resolve this by
factoring out convertLocVTFromValVT from unpackFromRegLoc. Also rename
packIntoRegLoc to the more appropriate convertValVTToLocVT and call these
helper functions consistently.
llvm-svn: 343737
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 73 |
1 files changed, 33 insertions, 40 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 44da49c23d5..69569752183 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -868,6 +868,22 @@ void RISCVTargetLowering::analyzeOutputArgs( } } +// Convert Val to a ValVT. Should not be called for CCValAssign::Indirect +// values. +static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, + const CCValAssign &VA, const SDLoc &DL) { + switch (VA.getLocInfo()) { + default: + llvm_unreachable("Unexpected CCValAssign::LocInfo"); + case CCValAssign::Full: + break; + case CCValAssign::BCvt: + Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); + break; + } + return Val; +} + // The caller is responsible for loading the full value if the argument is // passed with CCValAssign::Indirect. static SDValue unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, @@ -875,21 +891,29 @@ static SDValue unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, MachineFunction &MF = DAG.getMachineFunction(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); EVT LocVT = VA.getLocVT(); - EVT ValVT = VA.getValVT(); SDValue Val; unsigned VReg = RegInfo.createVirtualRegister(&RISCV::GPRRegClass); RegInfo.addLiveIn(VA.getLocReg(), VReg); Val = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); + if (VA.getLocInfo() == CCValAssign::Indirect) + return Val; + + return convertLocVTToValVT(DAG, Val, VA, DL); +} + +static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, + const CCValAssign &VA, const SDLoc &DL) { + EVT LocVT = VA.getLocVT(); + switch (VA.getLocInfo()) { default: llvm_unreachable("Unexpected CCValAssign::LocInfo"); case CCValAssign::Full: - case CCValAssign::Indirect: break; case CCValAssign::BCvt: - Val = DAG.getNode(ISD::BITCAST, DL, ValVT, Val); + Val = DAG.getNode(ISD::BITCAST, DL, LocVT, Val); break; } return Val; @@ -1291,13 +1315,7 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI, // Promote the value if needed. // For now, only handle fully promoted and indirect arguments. - switch (VA.getLocInfo()) { - case CCValAssign::Full: - break; - case CCValAssign::BCvt: - ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), ArgValue); - break; - case CCValAssign::Indirect: { + if (VA.getLocInfo() == CCValAssign::Indirect) { // Store the argument in a stack slot and pass its address. SDValue SpillSlot = DAG.CreateStackTemporary(Outs[i].ArgVT); int FI = cast<FrameIndexSDNode>(SpillSlot)->getIndex(); @@ -1319,10 +1337,8 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI, ++i; } ArgValue = SpillSlot; - break; - } - default: - llvm_unreachable("Unknown loc info!"); + } else { + ArgValue = convertValVTToLocVT(DAG, ArgValue, VA, DL); } // Use local copy if it is a byval arg. @@ -1424,6 +1440,7 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI, // Glue the RetValue to the end of the call sequence Chain = RetValue.getValue(1); Glue = RetValue.getValue(2); + if (VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64) { assert(VA.getLocReg() == ArgGPRs[0] && "Unexpected reg assignment"); SDValue RetValue2 = @@ -1434,15 +1451,7 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI, RetValue2); } - switch (VA.getLocInfo()) { - default: - llvm_unreachable("Unknown loc info!"); - case CCValAssign::Full: - break; - case CCValAssign::BCvt: - RetValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), RetValue); - break; - } + RetValue = convertLocVTToValVT(DAG, RetValue, VA, DL); InVals.push_back(RetValue); } @@ -1465,22 +1474,6 @@ bool RISCVTargetLowering::CanLowerReturn( return true; } -static SDValue packIntoRegLoc(SelectionDAG &DAG, SDValue Val, - const CCValAssign &VA, const SDLoc &DL) { - EVT LocVT = VA.getLocVT(); - - switch (VA.getLocInfo()) { - default: - llvm_unreachable("Unexpected CCValAssign::LocInfo"); - case CCValAssign::Full: - break; - case CCValAssign::BCvt: - Val = DAG.getNode(ISD::BITCAST, DL, LocVT, Val); - break; - } - return Val; -} - SDValue RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, @@ -1523,7 +1516,7 @@ RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); } else { // Handle a 'normal' return. - Val = packIntoRegLoc(DAG, Val, VA, DL); + Val = convertValVTToLocVT(DAG, Val, VA, DL); Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue); // Guarantee that all emitted copies are stuck together. |