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| author | Dan Gohman <gohman@apple.com> | 2009-04-13 15:22:29 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-13 15:22:29 +0000 |
| commit | 1d50407932e2f44fe43fad5e5d4ed54efdbd3c69 (patch) | |
| tree | 10cde0e560577fc7c5b60e0fb935ad0bba9a0888 | |
| parent | 4d62ff148347da95e2e76aed460d314f93bfa712 (diff) | |
| download | bcm5719-llvm-1d50407932e2f44fe43fad5e5d4ed54efdbd3c69.tar.gz bcm5719-llvm-1d50407932e2f44fe43fad5e5d4ed54efdbd3c69.zip | |
Don't abort on an aliasing physical register that does not have
a live interval. This is needed for some upcoming subreg changes.
llvm-svn: 68956
| -rw-r--r-- | llvm/lib/CodeGen/LiveIntervalAnalysis.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp index 3bc05a9b9a6..7c8041b1691 100644 --- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -2235,7 +2235,7 @@ bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li, // If there are registers which alias PhysReg, but which are not a // sub-register of the chosen representative super register. Assert // since we can't handle it yet. - assert(*AS == SpillReg || !allocatableRegs_[*AS] || + assert(*AS == SpillReg || !allocatableRegs_[*AS] || !hasInterval(*AS) || tri_->isSuperRegister(*AS, SpillReg)); bool Cut = false; |
