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| author | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2018-09-28 15:08:49 +0000 |
|---|---|---|
| committer | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2018-09-28 15:08:49 +0000 |
| commit | 1cbb057142c74be109693adf36654a9ee0bae23d (patch) | |
| tree | 0e30995b85292107d33bcf8ccd5d8432bff35135 | |
| parent | 122dbb5dceeb9c13026cb3dd4064b91c554f919f (diff) | |
| download | bcm5719-llvm-1cbb057142c74be109693adf36654a9ee0bae23d.tar.gz bcm5719-llvm-1cbb057142c74be109693adf36654a9ee0bae23d.zip | |
[GISel]: Remove an incorrect assert in CallLowering
https://reviews.llvm.org/D51147
Asserting if any extend of vectors should be up to the target's
legalizer/target specific code not in CallLowering.
reviewed by : dsanders.
llvm-svn: 343325
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll | 13 |
2 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp index 07de31bec66..da972eae756 100644 --- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp @@ -164,7 +164,6 @@ unsigned CallLowering::ValueHandler::extendRegister(unsigned ValReg, // nop in big-endian situations. return ValReg; case CCValAssign::AExt: { - assert(!VA.getLocVT().isVector() && "unexpected vector extend"); auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); return MIB->getOperand(0).getReg(); } diff --git a/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll b/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll new file mode 100644 index 00000000000..5e9311559b4 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll @@ -0,0 +1,13 @@ +; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -o - -global-isel %s -stop-after=irtranslator | FileCheck %s + +define <4 x i1> @foo() { + ; CHECK-LABEL: name: foo + ; CHECK: bb.1.entry: + ; CHECK: [[DEF:%[0-9]+]]:_(<4 x s1>) = G_IMPLICIT_DEF + ; CHECK: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[DEF]](<4 x s1>) + ; CHECK: $xmm0 = COPY [[ANYEXT]](<4 x s32>) + ; CHECK: RET 0, implicit $xmm0 +entry: + ret <4 x i1> undef ; +} |

