diff options
author | Pete Couperus <petecoup@synopsys.com> | 2019-05-15 19:46:17 +0000 |
---|---|---|
committer | Pete Couperus <petecoup@synopsys.com> | 2019-05-15 19:46:17 +0000 |
commit | 1ca049959f579c1d5f51ffc0ed8a4d74e8a1c6c8 (patch) | |
tree | 8dbdc870492ad099f23e544af78e468b9620313b | |
parent | a4d29b8e20d4615931a1904a3a5c1cd84796beb7 (diff) | |
download | bcm5719-llvm-1ca049959f579c1d5f51ffc0ed8a4d74e8a1c6c8.tar.gz bcm5719-llvm-1ca049959f579c1d5f51ffc0ed8a4d74e8a1c6c8.zip |
Uncomment LLVM_FALLTHROUGH.
llvm-svn: 360798
-rw-r--r-- | llvm/lib/Target/ARC/ARCOptAddrMode.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARC/ARCOptAddrMode.cpp b/llvm/lib/Target/ARC/ARCOptAddrMode.cpp index 49823a83ca0..e1680b476bd 100644 --- a/llvm/lib/Target/ARC/ARCOptAddrMode.cpp +++ b/llvm/lib/Target/ARC/ARCOptAddrMode.cpp @@ -124,7 +124,7 @@ static bool isAddConstantOp(const MachineInstr &MI, int64_t &Amount) { switch (MI.getOpcode()) { case ARC::SUB_rru6: Sign = -1; - // LLVM_FALLTHROUGH + LLVM_FALLTHROUGH; case ARC::ADD_rru6: assert(MI.getOperand(2).isImm() && "Expected immediate operand"); Amount = Sign * MI.getOperand(2).getImm(); |