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| author | Craig Topper <craig.topper@gmail.com> | 2017-04-09 06:12:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-04-09 06:12:36 +0000 |
| commit | 1c5af0d4007895b64c7760bed63d9bebf6b8399b (patch) | |
| tree | d4e9341ece1505d6afd915dc40b94b083e4a9cb3 | |
| parent | 437c97622b8d7b576f270b807e493bc076f36767 (diff) | |
| download | bcm5719-llvm-1c5af0d4007895b64c7760bed63d9bebf6b8399b.tar.gz bcm5719-llvm-1c5af0d4007895b64c7760bed63d9bebf6b8399b.zip | |
[InstCombine] Add test cases to show missing support for vectors in an OR combine. Also add the commuted versions. NFC
llvm-svn: 299820
| -rw-r--r-- | llvm/test/Transforms/InstCombine/and.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll index f9cae942b3a..be8aba99916 100644 --- a/llvm/test/Transforms/InstCombine/and.ll +++ b/llvm/test/Transforms/InstCombine/and.ll @@ -417,6 +417,48 @@ define i32 @test33(i32 %b) { ret i32 %tmp.13 } +define i32 @test33b(i32 %b) { +; CHECK-LABEL: @test33b( +; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 [[B:%.*]], 1 +; CHECK-NEXT: ret i32 [[TMP_13]] +; + %tmp.4.mask = and i32 %b, 1 + %tmp.10 = xor i32 %tmp.4.mask, 1 + %tmp.12 = and i32 %b, -2 + %tmp.13 = or i32 %tmp.10, %tmp.12 + ret i32 %tmp.13 +} + +define <2 x i32> @test33vec(<2 x i32> %b) { +; CHECK-LABEL: @test33vec( +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1> +; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1> +; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2> +; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_12]], [[TMP_10]] +; CHECK-NEXT: ret <2 x i32> [[TMP_13]] +; + %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1> + %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1> + %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2> + %tmp.13 = or <2 x i32> %tmp.12, %tmp.10 + ret <2 x i32> %tmp.13 +} + +define <2 x i32> @test33vecb(<2 x i32> %b) { +; CHECK-LABEL: @test33vecb( +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1> +; CHECK-NEXT: [[TMP_10:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1> +; CHECK-NEXT: [[TMP_12:%.*]] = and <2 x i32> [[B]], <i32 -2, i32 -2> +; CHECK-NEXT: [[TMP_13:%.*]] = or <2 x i32> [[TMP_10]], [[TMP_12]] +; CHECK-NEXT: ret <2 x i32> [[TMP_13]] +; + %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1> + %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1> + %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2> + %tmp.13 = or <2 x i32> %tmp.10, %tmp.12 + ret <2 x i32> %tmp.13 +} + define i32 @test34(i32 %A, i32 %B) { ; CHECK-LABEL: @test34( ; CHECK-NEXT: ret i32 %B |
