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authorAlex Bradbury <asb@lowrisc.org>2019-08-19 13:23:02 +0000
committerAlex Bradbury <asb@lowrisc.org>2019-08-19 13:23:02 +0000
commit1c1f8f215d89f1946ec4942c0d4ce8d4bd4f33f3 (patch)
treedca263db46939350a48e0bc31f8791352ad2f999
parent88df53e6eaf355271e90fa928df53ab6ea244a69 (diff)
downloadbcm5719-llvm-1c1f8f215d89f1946ec4942c0d4ce8d4bd4f33f3.tar.gz
bcm5719-llvm-1c1f8f215d89f1946ec4942c0d4ce8d4bd4f33f3.zip
[RISCV] Don't force absolute FK_Data_X fixups to relocs
The current behavior of shouldForceRelocation forces relocations for the majority of fixups when relaxation is enabled. This makes sense for fixups which incorporate symbols but is unnecessary for simple data fixups where the fixup target is already resolved to an absolute value. Differential Revision: https://reviews.llvm.org/D63404 Patch by Edward Jones. llvm-svn: 369257
-rw-r--r--llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp7
-rw-r--r--llvm/test/MC/RISCV/fde-reloc.s3
-rw-r--r--llvm/test/MC/RISCV/linker-relaxation.s21
3 files changed, 28 insertions, 3 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 9d94be12635..61c5845cc17 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -33,6 +33,13 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
switch ((unsigned)Fixup.getKind()) {
default:
break;
+ case FK_Data_1:
+ case FK_Data_2:
+ case FK_Data_4:
+ case FK_Data_8:
+ if (Target.isAbsolute())
+ return false;
+ break;
case RISCV::fixup_riscv_got_hi20:
case RISCV::fixup_riscv_tls_got_hi20:
case RISCV::fixup_riscv_tls_gd_hi20:
diff --git a/llvm/test/MC/RISCV/fde-reloc.s b/llvm/test/MC/RISCV/fde-reloc.s
index e2f7c032ed6..a2cb0825cff 100644
--- a/llvm/test/MC/RISCV/fde-reloc.s
+++ b/llvm/test/MC/RISCV/fde-reloc.s
@@ -14,9 +14,6 @@ func:
# preparation for follow-on patches to fix it.
# RELAX-RELOC: Section (4) .rela.eh_frame {
-# RELAX-RELOC-NEXT: 0x0 R_RISCV_32 - 0x10
-# RELAX-RELOC-NEXT: 0x14 R_RISCV_32 - 0x10
-# RELAX-RELOC-NEXT: 0x18 R_RISCV_32 - 0x18
# RELAX-RELOC-NEXT: 0x1C R_RISCV_ADD32 - 0x0
# RELAX-RELOC-NEXT: 0x1C R_RISCV_SUB32 - 0x0
# RELAX-RELOC-NEXT: 0x20 R_RISCV_ADD32 - 0x0
diff --git a/llvm/test/MC/RISCV/linker-relaxation.s b/llvm/test/MC/RISCV/linker-relaxation.s
index bc8a90ab2a4..411c7f88870 100644
--- a/llvm/test/MC/RISCV/linker-relaxation.s
+++ b/llvm/test/MC/RISCV/linker-relaxation.s
@@ -136,3 +136,24 @@ sb t1, %pcrel_lo(2b)(a2)
# RELAX-RELOC: R_RISCV_RELAX - 0x0
# RELAX-FIXUP: fixup A - offset: 0, value: %pcrel_lo(.Ltmp1), kind: fixup_riscv_pcrel_lo12_s
# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
+
+# Check that a relocation is not emitted for a symbol difference which has
+# been folded to a fixup with an absolute value. This can happen when a
+# difference expression refers to two symbols, at least one of which is
+# not defined at the point it is referenced. Then during *assembler*
+# relaxation when both symbols have become defined the difference may be folded
+# down to a fixup simply containing the absolute value. We want to ensure that
+# we don't force a relocation to be emitted for this absolute value even
+# when linker relaxation is enabled. The reason for this is that one instance
+# where this pattern appears in in the .eh_frame section (the CIE 'length'
+# field), and the .eh_frame section cannot be parsed by the linker unless the
+# fixup has been resolved to a concrete value instead of a relocation.
+ .data
+lo:
+ .word hi-lo
+ .quad hi-lo
+# NORELAX-RELOC-NOT: R_RISCV_32
+# NORELAX-RELOC-NOT: R_RISCV_64
+# RELAX-RELOC-NOT: R_RISCV_32
+# RELAX-RELOC-NOT: R_RISCV_64
+hi:
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