diff options
author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-14 13:31:14 +0000 |
---|---|---|
committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-09-14 13:31:14 +0000 |
commit | 1c1335a10dd3678acbf6091ed6b235e049e808f9 (patch) | |
tree | e1e3d1a62134cbdd330d780cfe28bc00a5d38b46 | |
parent | 6a47cdbdecc8dae9c69135daa372248370db7116 (diff) | |
download | bcm5719-llvm-1c1335a10dd3678acbf6091ed6b235e049e808f9.tar.gz bcm5719-llvm-1c1335a10dd3678acbf6091ed6b235e049e808f9.zip |
[X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2
These have the same behaviour as tzcnt on btver2 - confirmed with AMD 16h SOG, Agner and instlatx64.
llvm-svn: 342235
-rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/bmi-schedule.ll | 24 | ||||
-rw-r--r-- | llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s | 50 |
3 files changed, 38 insertions, 38 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 5948b1fc610..9b1a45467e2 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -205,7 +205,7 @@ defm : JWriteResIntPair<WriteTZCNT, [JALU01], 2, [2]>; // BMI1 BEXTR/BLS, BMI2 BZHI defm : JWriteResIntPair<WriteBEXTR, [JALU01], 1>; -defm : JWriteResIntPair<WriteBLS, [JALU01], 1>; +defm : JWriteResIntPair<WriteBLS, [JALU01], 2, [2]>; defm : X86WriteResPairUnsupported<WriteBZHI>; //////////////////////////////////////////////////////////////////////////////// diff --git a/llvm/test/CodeGen/X86/bmi-schedule.ll b/llvm/test/CodeGen/X86/bmi-schedule.ll index 27a06dde99f..bd0ba7e72c8 100644 --- a/llvm/test/CodeGen/X86/bmi-schedule.ll +++ b/llvm/test/CodeGen/X86/bmi-schedule.ll @@ -238,8 +238,8 @@ define i32 @test_blsi_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsi_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsil (%rsi), %ecx # sched: [4:1.00] -; BTVER2-NEXT: blsil %edi, %eax # sched: [1:0.50] +; BTVER2-NEXT: blsil (%rsi), %ecx # sched: [5:1.00] +; BTVER2-NEXT: blsil %edi, %eax # sched: [2:1.00] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -289,8 +289,8 @@ define i64 @test_blsi_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsi_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsiq (%rsi), %rcx # sched: [4:1.00] -; BTVER2-NEXT: blsiq %rdi, %rax # sched: [1:0.50] +; BTVER2-NEXT: blsiq (%rsi), %rcx # sched: [5:1.00] +; BTVER2-NEXT: blsiq %rdi, %rax # sched: [2:1.00] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -340,8 +340,8 @@ define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsmsk_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsmskl (%rsi), %ecx # sched: [4:1.00] -; BTVER2-NEXT: blsmskl %edi, %eax # sched: [1:0.50] +; BTVER2-NEXT: blsmskl (%rsi), %ecx # sched: [5:1.00] +; BTVER2-NEXT: blsmskl %edi, %eax # sched: [2:1.00] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -391,8 +391,8 @@ define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsmsk_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsmskq (%rsi), %rcx # sched: [4:1.00] -; BTVER2-NEXT: blsmskq %rdi, %rax # sched: [1:0.50] +; BTVER2-NEXT: blsmskq (%rsi), %rcx # sched: [5:1.00] +; BTVER2-NEXT: blsmskq %rdi, %rax # sched: [2:1.00] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -442,8 +442,8 @@ define i32 @test_blsr_i32(i32 %a0, i32 *%a1) { ; ; BTVER2-LABEL: test_blsr_i32: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsrl (%rsi), %ecx # sched: [4:1.00] -; BTVER2-NEXT: blsrl %edi, %eax # sched: [1:0.50] +; BTVER2-NEXT: blsrl (%rsi), %ecx # sched: [5:1.00] +; BTVER2-NEXT: blsrl %edi, %eax # sched: [2:1.00] ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; @@ -493,8 +493,8 @@ define i64 @test_blsr_i64(i64 %a0, i64 *%a1) { ; ; BTVER2-LABEL: test_blsr_i64: ; BTVER2: # %bb.0: -; BTVER2-NEXT: blsrq (%rsi), %rcx # sched: [4:1.00] -; BTVER2-NEXT: blsrq %rdi, %rax # sched: [1:0.50] +; BTVER2-NEXT: blsrq (%rsi), %rcx # sched: [5:1.00] +; BTVER2-NEXT: blsrq %rdi, %rax # sched: [2:1.00] ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s index 39c515042a6..4d9cdcf7c1c 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s @@ -54,18 +54,18 @@ tzcnt (%rax), %rcx # CHECK-NEXT: 1 4 1.00 * bextrl %eax, (%rbx), %ecx # CHECK-NEXT: 1 1 0.50 bextrq %rax, %rbx, %rcx # CHECK-NEXT: 1 4 1.00 * bextrq %rax, (%rbx), %rcx -# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx -# CHECK-NEXT: 1 4 1.00 * blsil (%rax), %ecx -# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx -# CHECK-NEXT: 1 4 1.00 * blsiq (%rax), %rcx -# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx -# CHECK-NEXT: 1 4 1.00 * blsmskl (%rax), %ecx -# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx -# CHECK-NEXT: 1 4 1.00 * blsmskq (%rax), %rcx -# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx -# CHECK-NEXT: 1 4 1.00 * blsrl (%rax), %ecx -# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx -# CHECK-NEXT: 1 4 1.00 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 2 1.00 blsil %eax, %ecx +# CHECK-NEXT: 1 5 1.00 * blsil (%rax), %ecx +# CHECK-NEXT: 1 2 1.00 blsiq %rax, %rcx +# CHECK-NEXT: 1 5 1.00 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 2 1.00 blsmskl %eax, %ecx +# CHECK-NEXT: 1 5 1.00 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 2 1.00 blsmskq %rax, %rcx +# CHECK-NEXT: 1 5 1.00 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 2 1.00 blsrl %eax, %ecx +# CHECK-NEXT: 1 5 1.00 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 2 1.00 blsrq %rax, %rcx +# CHECK-NEXT: 1 5 1.00 * blsrq (%rax), %rcx # CHECK-NEXT: 1 2 1.00 tzcntl %eax, %ecx # CHECK-NEXT: 1 5 1.00 * tzcntl (%rax), %ecx # CHECK-NEXT: 1 2 1.00 tzcntq %rax, %rcx @@ -89,7 +89,7 @@ tzcnt (%rax), %rcx # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: 14.00 14.00 - - - - - 12.00 - - - - - - +# CHECK-NEXT: 20.00 20.00 - - - - - 12.00 - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: @@ -101,18 +101,18 @@ tzcnt (%rax), %rcx # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - bextrl %eax, (%rbx), %ecx # CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - bextrq %rax, %rbx, %rcx # CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - bextrq %rax, (%rbx), %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsil %eax, %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsil (%rax), %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsiq %rax, %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsiq (%rax), %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsmskl %eax, %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsmskl (%rax), %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsmskq %rax, %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsmskq (%rax), %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsrl %eax, %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsrl (%rax), %ecx -# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsrq %rax, %rcx -# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsrq (%rax), %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsil %eax, %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsil (%rax), %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsiq %rax, %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsiq (%rax), %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsmskl %eax, %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsmskl (%rax), %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsmskq %rax, %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsmskq (%rax), %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsrl %eax, %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsrl (%rax), %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - blsrq %rax, %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - blsrq (%rax), %rcx # CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - tzcntl %eax, %ecx # CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - tzcntl (%rax), %ecx # CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - tzcntq %rax, %rcx |