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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-07-01 20:45:19 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2016-07-01 20:45:19 +0000
commit1bba89612b1a03bf3f35455e2ae1e2fb3af7849a (patch)
treecb10f9fd52b84016c7f25a734ba5ecc52dacbf01
parente929f424a4b49220c9f249b47bb5c1d73af9841a (diff)
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[Hexagon] Revert r274381: that was actually wrong
llvm-svn: 274384
-rw-r--r--llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
index 05329211f52..6f65e2203a6 100644
--- a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
@@ -349,7 +349,7 @@ void HexagonExpandCondsets::updateKillFlags(unsigned Reg) {
// Set the <kill> flag on a use of Reg whose lane mask is contained in LM.
MachineInstr *MI = LIS->getInstructionFromIndex(K);
for (auto &Op : MI->operands()) {
- if (!Op.isReg() || !Op.readsReg() || Op.getReg() != Reg)
+ if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg)
continue;
LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg());
if ((SLM & LM) == SLM) {
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