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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2013-11-25 20:15:14 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2013-11-25 20:15:14 +0000 |
| commit | 1b8bfdaae3264efdba964321956965a6ab47540a (patch) | |
| tree | 7703f80ed30e178e14305b42632a197d1c94db1e | |
| parent | 7266731f9edef92e459084c323e67a7b918ee7a8 (diff) | |
| download | bcm5719-llvm-1b8bfdaae3264efdba964321956965a6ab47540a.tar.gz bcm5719-llvm-1b8bfdaae3264efdba964321956965a6ab47540a.zip | |
Don't use nopl in cpus that don't support it.
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.
The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
Crusoe, Microsoft VirtualBox - see
https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
Via c3 and c3-Nehemiah don't have nopl
llvm-svn: 195679
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86_nop.s | 27 |
2 files changed, 30 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp index c1a710be5c2..1c6f07121d9 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -309,8 +309,12 @@ bool X86AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { // This CPU doesnt support long nops. If needed add more. // FIXME: Can we get this from the subtarget somehow? + // FIXME: We could generated something better than plain 0x90. if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || - CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") { + CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" || + CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" || + CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" || + CPU == "c3-2") { for (uint64_t i = 0; i < Count; ++i) OW->Write8(0x90); return true; diff --git a/llvm/test/MC/X86/x86_nop.s b/llvm/test/MC/X86/x86_nop.s index 396e3022ebe..e8eed6a7d20 100644 --- a/llvm/test/MC/X86/x86_nop.s +++ b/llvm/test/MC/X86/x86_nop.s @@ -5,9 +5,32 @@ # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium %s | llvm-objdump -d - | FileCheck %s # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium-mmx %s | llvm-objdump -d - | FileCheck %s # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=geode %s | llvm-objdump -d - | FileCheck %s -# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i686 %s | llvm-objdump -d - | not FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i686 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6-2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6-3 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=winchip-c6 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=winchip2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=c3 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=c3-2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=core2 %s | llvm-objdump -d - | FileCheck --check-prefix=NOPL %s + -# CHECK-NOT: nop{{[lw]}} inc %eax .align 8 inc %eax + +// CHECK: 0: 40 incl %eax +// CHECK: 1: 90 nop +// CHECK: 2: 90 nop +// CHECK: 3: 90 nop +// CHECK: 4: 90 nop +// CHECK: 5: 90 nop +// CHECK: 6: 90 nop +// CHECK: 7: 90 nop +// CHECK: 8: 40 incl %eax + + +// NOPL: 0: 40 incl %eax +// NOPL: 1: 0f 1f 80 00 00 00 00 nopl (%eax) +// NOPL: 8: 40 incl %eax |
