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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-20 16:56:10 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-20 16:56:10 +0000 |
commit | 1aad3835f869b7a9b58433524a33059b8f5d1f51 (patch) | |
tree | d3a20ba067071be132d7076171b1f3c098ab3f58 | |
parent | bba8fd71324945980ae0baf09919fe3a3bd6e3ab (diff) | |
download | bcm5719-llvm-1aad3835f869b7a9b58433524a33059b8f5d1f51.tar.gz bcm5719-llvm-1aad3835f869b7a9b58433524a33059b8f5d1f51.zip |
AMDGPU: Fix missing OPERAND_IMMEDIATE
llvm-svn: 375365
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.td | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index a3b08c716a4..1eecbf55561 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -871,6 +871,18 @@ def ExpTgtMatchClass : AsmOperandClass { let RenderMethod = "printExpTgt"; } +def SWaitMatchClass : AsmOperandClass { + let Name = "SWaitCnt"; + let RenderMethod = "addImmOperands"; + let ParserMethod = "parseSWaitCntOps"; +} + +def VReg32OrOffClass : AsmOperandClass { + let Name = "VReg32OrOff"; + let ParserMethod = "parseVReg32OrOff"; +} + +let OperandType = "OPERAND_IMMEDIATE" in { def SendMsgImm : Operand<i32> { let PrintMethod = "printSendMsg"; let ParserMatchClass = SendMsgMatchClass; @@ -886,22 +898,11 @@ def EndpgmImm : Operand<i16> { let ParserMatchClass = EndpgmMatchClass; } -def SWaitMatchClass : AsmOperandClass { - let Name = "SWaitCnt"; - let RenderMethod = "addImmOperands"; - let ParserMethod = "parseSWaitCntOps"; -} - -def VReg32OrOffClass : AsmOperandClass { - let Name = "VReg32OrOff"; - let ParserMethod = "parseVReg32OrOff"; -} - def WAIT_FLAG : Operand <i32> { let ParserMatchClass = SWaitMatchClass; let PrintMethod = "printWaitFlag"; - let OperandType = "OPERAND_IMMEDIATE"; } +} // End OperandType = "OPERAND_IMMEDIATE" include "SIInstrFormats.td" include "VIInstrFormats.td" |