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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-02-15 15:47:53 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2018-02-15 15:47:53 +0000 |
commit | 18e0d2a1f86142db9476d091bfd9c92ed6bb418e (patch) | |
tree | b1e9a272be4a6a254f2e31dcdbf136cc41e1cb1c | |
parent | 40bf17c1ea000bf230ae28cd8af9f4c11e458595 (diff) | |
download | bcm5719-llvm-18e0d2a1f86142db9476d091bfd9c92ed6bb418e.tar.gz bcm5719-llvm-18e0d2a1f86142db9476d091bfd9c92ed6bb418e.zip |
[Hexagon] Fix lowering of formal arguments after r324737
Lowering of formal arguments needs to be aware of vararg functions.
llvm-svn: 325255
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 34 | ||||
-rw-r--r-- | llvm/test/CodeGen/Hexagon/vararg-formal.ll | 12 |
2 files changed, 28 insertions, 18 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index fd99a8fd0f0..e20c2875cb6 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -107,14 +107,20 @@ static cl::opt<int> MaxStoresPerMemsetOptSizeCL("max-store-memset-Os", namespace { class HexagonCCState : public CCState { - unsigned NumNamedVarArgParams; + unsigned NumNamedVarArgParams = 0; public: HexagonCCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl<CCValAssign> &locs, LLVMContext &C, - int NumNamedVarArgParams) - : CCState(CC, IsVarArg, MF, locs, C), - NumNamedVarArgParams(NumNamedVarArgParams) {} + const Function *Callee) + : CCState(CC, IsVarArg, MF, locs, C) { + // If a function has zero args and is a vararg function, that's + // disallowed so it must be an undeclared function. Do not assume + // varargs if the callee is undefined. + if (Callee && Callee->isVarArg() && + Callee->getFunctionType()->getNumParams() != 0) + NumNamedVarArgParams = Callee->getFunctionType()->getNumParams(); + } unsigned getNumNamedVarArgParams() const { return NumNamedVarArgParams; } }; @@ -323,25 +329,17 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, MachineFrameInfo &MFI = MF.getFrameInfo(); auto PtrVT = getPointerTy(MF.getDataLayout()); - // Check for varargs. - unsigned NumNamedVarArgParams = 0; - + const Function *CalleeF = nullptr; if (GlobalAddressSDNode *GAN = dyn_cast<GlobalAddressSDNode>(Callee)) { const GlobalValue *GV = GAN->getGlobal(); Callee = DAG.getTargetGlobalAddress(GV, dl, MVT::i32); - if (const Function* F = dyn_cast<Function>(GV)) { - // If a function has zero args and is a vararg function, that's - // disallowed so it must be an undeclared function. Do not assume - // varargs if the callee is undefined. - if (F->isVarArg() && F->getFunctionType()->getNumParams() != 0) - NumNamedVarArgParams = F->getFunctionType()->getNumParams(); - } + CalleeF = dyn_cast<Function>(GV); } // Analyze operands of the call, assigning locations to each operand. SmallVector<CCValAssign, 16> ArgLocs; - HexagonCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), - ArgLocs, *DAG.getContext(), NumNamedVarArgParams); + HexagonCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext(), + CalleeF); if (Subtarget.useHVXOps()) CCInfo.AnalyzeCallOperands(Outs, CC_Hexagon_HVX); @@ -698,8 +696,8 @@ SDValue HexagonTargetLowering::LowerFormalArguments( // Assign locations to all of the incoming arguments. SmallVector<CCValAssign, 16> ArgLocs; - CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, - *DAG.getContext()); + HexagonCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext(), + &MF.getFunction()); if (Subtarget.useHVXOps()) CCInfo.AnalyzeFormalArguments(Ins, CC_Hexagon_HVX); diff --git a/llvm/test/CodeGen/Hexagon/vararg-formal.ll b/llvm/test/CodeGen/Hexagon/vararg-formal.ll new file mode 100644 index 00000000000..6bba65fcab1 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/vararg-formal.ll @@ -0,0 +1,12 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Make sure that the first formal argument is not loaded from memory. +; CHECK-NOT: memw + +define i32 @fred(i32 %a0, ...) #0 { +b1: + %v2 = add i32 %a0, 1 + ret i32 %v2 +} + +attributes #0 = { nounwind } |