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author | Jonas Paulsson <jonas.paulsson@ericsson.com> | 2015-10-21 07:39:47 +0000 |
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committer | Jonas Paulsson <jonas.paulsson@ericsson.com> | 2015-10-21 07:39:47 +0000 |
commit | 17ad04535faaf580f10c23d6622a55a3aefe845b (patch) | |
tree | 0b893eb3f18b2887608373d000447ac4800c81d1 | |
parent | 896c66ecc64e9f8fa80b08b8d9d7eecfce5c3acd (diff) | |
download | bcm5719-llvm-17ad04535faaf580f10c23d6622a55a3aefe845b.tar.gz bcm5719-llvm-17ad04535faaf580f10c23d6622a55a3aefe845b.zip |
Let MachineVerifier be aware of mem-to-mem instructions.
A mem-to-mem instruction (that both loads and stores), which store to an
FI, cannot pass the verifier since it thinks it is loading from the FI.
For the mem-to-mem instruction, do a looser check in visitMachineOperand()
and only check liveness at the reg-slot while analyzing a frame index operand.
Needed to make CodeGen/SystemZ/xor-01.ll pass with -verify-machineinstrs,
which now runs with this flag.
Reviewed by Evan Cheng and Quentin Colombet.
llvm-svn: 250885
-rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 10 | ||||
-rw-r--r-- | llvm/test/CodeGen/SystemZ/xor-01.ll | 2 |
2 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index c21b875a082..b9ca0c51d76 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -994,11 +994,17 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { LiveInts && !LiveInts->isNotInMIMap(MI)) { LiveInterval &LI = LiveStks->getInterval(MO->getIndex()); SlotIndex Idx = LiveInts->getInstructionIndex(MI); - if (MI->mayLoad() && !LI.liveAt(Idx.getRegSlot(true))) { + + // For a memory-to-memory move, we don't know if MI is using + // this frame index for loading or storing, so check for + // liveness at reg-slot only in the simple load case. + bool stores = MI->mayStore(); + bool simpleLoad = (MI->mayLoad() && !stores); + if (simpleLoad && !LI.liveAt(Idx.getRegSlot(true))) { report("Instruction loads from dead spill slot", MO, MONum); errs() << "Live stack: " << LI << '\n'; } - if (MI->mayStore() && !LI.liveAt(Idx.getRegSlot())) { + if (stores && !LI.liveAt(Idx.getRegSlot())) { report("Instruction stores to dead spill slot", MO, MONum); errs() << "Live stack: " << LI << '\n'; } diff --git a/llvm/test/CodeGen/SystemZ/xor-01.ll b/llvm/test/CodeGen/SystemZ/xor-01.ll index e0aaffbb257..281f386ce95 100644 --- a/llvm/test/CodeGen/SystemZ/xor-01.ll +++ b/llvm/test/CodeGen/SystemZ/xor-01.ll @@ -1,6 +1,6 @@ ; Test 32-bit XORs in which the second operand is variable. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s declare i32 @foo() |