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authorEric Christopher <echristo@apple.com>2011-06-30 01:05:46 +0000
committerEric Christopher <echristo@apple.com>2011-06-30 01:05:46 +0000
commit16cde8ad36dc1631ab7f4509033cb7d78bbbcccc (patch)
treef950ef9eef5d141a1ca8130415cfb7bed15b4173
parentc932173773948ba14c341e279e449f2e7d2fde77 (diff)
downloadbcm5719-llvm-16cde8ad36dc1631ab7f4509033cb7d78bbbcccc.tar.gz
bcm5719-llvm-16cde8ad36dc1631ab7f4509033cb7d78bbbcccc.zip
Make sure we use the correct register class here since we'll need to
care about spill values. llvm-svn: 134122
-rw-r--r--llvm/lib/Target/Alpha/AlphaISelLowering.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index 54433a4c36f..daf95551896 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -835,7 +835,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
case 'r':
return std::make_pair(0U, Alpha::GPRCRegisterClass);
case 'f':
- return std::make_pair(0U, Alpha::F4RCRegisterClass);
+ return VT == MVT::f64 ? std::make_pair(0U, Alpha::F8RCRegisterClass) :
+ std::make_pair(0U, Alpha::F4RCRegisterClass);
}
}
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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