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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-12 15:04:04 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-12 15:04:04 +0000 |
| commit | 14fd10e528f13dca27b48e35af9a4542cf10894d (patch) | |
| tree | 3f48c6674eb7f3f4c2dbac84bc430459625c9fd9 | |
| parent | 1a33da240133e13a7afe77de0a595d82d06a8b4b (diff) | |
| download | bcm5719-llvm-14fd10e528f13dca27b48e35af9a4542cf10894d.tar.gz bcm5719-llvm-14fd10e528f13dca27b48e35af9a4542cf10894d.zip | |
Fix PR34021 test on non-x86 build targets
llvm-svn: 313034
| -rw-r--r-- | clang/test/CodeGen/pr34021.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/clang/test/CodeGen/pr34021.c b/clang/test/CodeGen/pr34021.c index c3d1b0f3d58..3c7a75a95aa 100644 --- a/clang/test/CodeGen/pr34021.c +++ b/clang/test/CodeGen/pr34021.c @@ -5,20 +5,20 @@ typedef int v4si __attribute__ ((vector_size (16))); v4si rep() { // X86-LABEL: define <4 x i32> @rep -// X86: %retval = alloca <4 x i32>, align 16 -// X86-NEXT: %res = alloca <4 x i32>, align 16 -// X86-NEXT: %0 = bitcast <4 x i32>* %retval to i128* -// X86-NEXT: %1 = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"() -// X86-NEXT: %2 = zext i64 %1 to i128 -// X86-NEXT: store i128 %2, i128* %0, align 16 -// X86-NEXT: %3 = load <4 x i32>, <4 x i32>* %res, align 16 -// X86-NEXT: ret <4 x i32> %3 +// X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16 +// X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16 +// X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128* +// X86: %[[ASM:.*]] = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"() +// X86: %[[ZEXT:.*]] = zext i64 %[[ASM]] to i128 +// X86: store i128 %[[ZEXT]], i128* %[[BITCAST]], align 16 +// X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16 +// X86: ret <4 x i32> %[[LOAD]] // // X64-LABEL: define <4 x i32> @rep -// X64: %res = alloca <4 x i32>, align 16 -// X64-NEXT: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() -// X64-NEXT: %0 = load <4 x i32>, <4 x i32>* %res, align 16 -// X64-NEXT: ret <4 x i32> %0 +// X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16 +// X64: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() +// X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16 +// X64: ret <4 x i32> %[[LOAD]] v4si res; __asm {} return res; |
