summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-04-09 13:42:14 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-04-09 13:42:14 +0000
commit140fee078f6fc9706687ea55cd51e189c24903c3 (patch)
tree31112877ae8fc3ed107ff75150c2b3ff83f45ea2
parentf8ff2ef9662f79ebff2ab8e25097eac094c19667 (diff)
downloadbcm5719-llvm-140fee078f6fc9706687ea55cd51e189c24903c3.tar.gz
bcm5719-llvm-140fee078f6fc9706687ea55cd51e189c24903c3.zip
[X86][MMX] Fix missing itinerary for MOVQ2DQ instruction format
llvm-svn: 329567
-rw-r--r--llvm/lib/Target/X86/X86InstrFormats.td2
-rw-r--r--llvm/test/CodeGen/X86/mmx-schedule.ll2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td
index b3f858faad6..a12c35a31a5 100644
--- a/llvm/lib/Target/X86/X86InstrFormats.td
+++ b/llvm/lib/Target/X86/X86InstrFormats.td
@@ -644,7 +644,7 @@ class MMXSDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
: Ii8<o, F, outs, ins, asm, pattern, itin>, XD, Requires<[HasSSE2]>;
class MMXS2SIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
list<dag> pattern, InstrItinClass itin = NoItinerary>
- : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE2]>;
+ : Ii8<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[HasSSE2]>;
// SSE3 Instruction Templates:
//
diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll
index 9a75144e057..db17b4fa235 100644
--- a/llvm/test/CodeGen/X86/mmx-schedule.ll
+++ b/llvm/test/CodeGen/X86/mmx-schedule.ll
@@ -978,7 +978,7 @@ define <2 x i64> @test_movq2dq(x86_mmx %a0) optsize {
;
; ATOM-LABEL: test_movq2dq:
; ATOM: # %bb.0:
-; ATOM-NEXT: movq2dq %mm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.50]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movq2dq:
OpenPOWER on IntegriCloud