Fix LivePhysRegs::addLiveOuts

Summary:
The testing for returnBB was flipped which may cause ARM ld/st opt pass uses callee saved regs in returnBB when shrink-wrap is used.


Reviewers: t.p.northover, apazos, MatzeB

Subscribers: mcrosier, zzheng, aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D16434

llvm-svn: 258569

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index efbbcbe23e1..266f895a557 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -151,7 +151,7 @@ void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
   if (AddPristinesAndCSRs) {
     const MachineFunction &MF = *MBB->getParent();
     addPristines(*this, MF, *TRI);
-    if (!MBB->isReturnBlock()) {
+    if (MBB->isReturnBlock()) {
       // The return block has no successors whose live-ins we could merge
       // below. So instead we add the callee saved registers manually.
       for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)