summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChad Rosier <mcrosier@apple.com>2013-02-28 18:54:27 +0000
committerChad Rosier <mcrosier@apple.com>2013-02-28 18:54:27 +0000
commit11a9828745efd724e71e4b361a648bce5047ed14 (patch)
treed4c083e646a9b9c65b367b162fef842bf0f81570
parente595c6bf3c399f21de8effd90547ef6ee8f87c85 (diff)
downloadbcm5719-llvm-11a9828745efd724e71e4b361a648bce5047ed14.tar.gz
bcm5719-llvm-11a9828745efd724e71e4b361a648bce5047ed14.zip
Style; no functional change.
llvm-svn: 176285
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp11
1 files changed, 4 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 244dac5ca43..60a07a474fa 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -6343,14 +6343,11 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock();
unsigned trap_opcode;
- if (Subtarget->isThumb()) {
+ if (Subtarget->isThumb())
trap_opcode = ARM::tTRAP;
- } else {
- if (Subtarget->useNaClTrap())
- trap_opcode = ARM::TRAPNaCl;
- else
- trap_opcode = ARM::TRAP;
- }
+ else
+ trap_opcode = Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP;
+
BuildMI(TrapBB, dl, TII->get(trap_opcode));
DispatchBB->addSuccessor(TrapBB);
OpenPOWER on IntegriCloud