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| author | Guillaume Chatelet <gchatelet@google.com> | 2019-10-30 10:13:15 +0100 |
|---|---|---|
| committer | Guillaume Chatelet <gchatelet@google.com> | 2019-10-30 10:35:13 +0100 |
| commit | 119b436da1c071655c4d5c9c52ff54c7c91d13ae (patch) | |
| tree | b2a614c67746f21d9659cccbd2997d1e22062517 | |
| parent | 4a372093e7c231e369b6fde69031f0feb2c83ecb (diff) | |
| download | bcm5719-llvm-119b436da1c071655c4d5c9c52ff54c7c91d13ae.tar.gz bcm5719-llvm-119b436da1c071655c4d5c9c52ff54c7c91d13ae.zip | |
[Alignment] Use Align for TFI.getStackAlignment() in X86ISelLowering
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet, craig.topper, rnk
Reviewed By: rnk
Subscribers: rnk, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69034
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 44 |
1 files changed, 18 insertions, 26 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b88741b6ffe..f79bc84930f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4183,23 +4183,13 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, /// Make the stack size align e.g 16n + 12 aligned for a 16-byte align /// requirement. unsigned -X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize, - SelectionDAG& DAG) const { - const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo(); - const TargetFrameLowering &TFI = *Subtarget.getFrameLowering(); - unsigned StackAlignment = TFI.getStackAlignment(); - uint64_t AlignMask = StackAlignment - 1; - int64_t Offset = StackSize; - unsigned SlotSize = RegInfo->getSlotSize(); - if ( (Offset & AlignMask) <= (StackAlignment - SlotSize) ) { - // Number smaller than 12 so just add the difference. - Offset += ((StackAlignment - SlotSize) - (Offset & AlignMask)); - } else { - // Mask out lower bits, add stackalignment once plus the 12 bytes. - Offset = ((~AlignMask) & Offset) + StackAlignment + - (StackAlignment-SlotSize); - } - return Offset; +X86TargetLowering::GetAlignedArgumentStackSize(const unsigned StackSize, + SelectionDAG &DAG) const { + const Align StackAlignment(Subtarget.getFrameLowering()->getStackAlignment()); + const uint64_t SlotSize = Subtarget.getRegisterInfo()->getSlotSize(); + assert(StackSize % SlotSize == 0 && + "StackSize must be a multiple of SlotSize"); + return alignTo(StackSize + SlotSize, StackAlignment) - SlotSize; } /// Return true if the given stack call argument is already available in the @@ -22213,7 +22203,7 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, SDNode *Node = Op.getNode(); SDValue Chain = Op.getOperand(0); SDValue Size = Op.getOperand(1); - unsigned Align = Op.getConstantOperandVal(2); + MaybeAlign Alignment(Op.getConstantOperandVal(2)); EVT VT = Node->getValueType(0); // Chain the dynamic stack allocation so that it doesn't modify the stack @@ -22233,11 +22223,12 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT); Chain = SP.getValue(1); const TargetFrameLowering &TFI = *Subtarget.getFrameLowering(); - unsigned StackAlign = TFI.getStackAlignment(); + const Align StackAlign(TFI.getStackAlignment()); Result = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value - if (Align > StackAlign) - Result = DAG.getNode(ISD::AND, dl, VT, Result, - DAG.getConstant(-(uint64_t)Align, dl, VT)); + if (Alignment && Alignment > StackAlign) + Result = + DAG.getNode(ISD::AND, dl, VT, Result, + DAG.getConstant(~(Alignment->value() - 1ULL), dl, VT)); Chain = DAG.getCopyToReg(Chain, dl, SPReg, Result); // Output chain } else if (SplitStack) { MachineRegisterInfo &MRI = MF.getRegInfo(); @@ -22268,9 +22259,9 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, SPTy); Chain = SP.getValue(1); - if (Align) { + if (Alignment) { SP = DAG.getNode(ISD::AND, dl, VT, SP.getValue(0), - DAG.getConstant(-(uint64_t)Align, dl, VT)); + DAG.getConstant(~(Alignment->value() - 1ULL), dl, VT)); Chain = DAG.getCopyToReg(Chain, dl, SPReg, SP); } @@ -24550,12 +24541,13 @@ SDValue X86TargetLowering::LowerFLT_ROUNDS_(SDValue Op, MachineFunction &MF = DAG.getMachineFunction(); const TargetFrameLowering &TFI = *Subtarget.getFrameLowering(); - unsigned StackAlignment = TFI.getStackAlignment(); + const Align StackAlignment(TFI.getStackAlignment()); MVT VT = Op.getSimpleValueType(); SDLoc DL(Op); // Save FP Control Word to stack slot - int SSFI = MF.getFrameInfo().CreateStackObject(2, StackAlignment, false); + int SSFI = + MF.getFrameInfo().CreateStackObject(2, StackAlignment.value(), false); SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy(DAG.getDataLayout())); |

