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| author | Zhou Sheng <zhousheng00@gmail.com> | 2008-06-06 08:32:05 +0000 |
|---|---|---|
| committer | Zhou Sheng <zhousheng00@gmail.com> | 2008-06-06 08:32:05 +0000 |
| commit | 1152ca9101388e247450bfef72c90ca92d163f0d (patch) | |
| tree | e936989a876b1d9311258d1de7e5e3bbbbbf91b3 | |
| parent | 6d7a144453974857121c2588ee7e91bcaa2b4ffd (diff) | |
| download | bcm5719-llvm-1152ca9101388e247450bfef72c90ca92d163f0d.tar.gz bcm5719-llvm-1152ca9101388e247450bfef72c90ca92d163f0d.zip | |
As Chris suggested, handle the situation if ShAmt larger than BitWidth,
otherwise, opt might crash.
llvm-svn: 52041
| -rw-r--r-- | llvm/lib/Transforms/Scalar/InstructionCombining.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp index 05e12692f4c..67c40fe21c9 100644 --- a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp @@ -1236,7 +1236,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask, // If the input sign bit is known to be zero, or if none of the top bits // are demanded, turn this into an unsigned shift right. - if (BitWidth == ShiftAmt || RHSKnownZero[BitWidth-ShiftAmt-1] || + if (BitWidth <= ShiftAmt || RHSKnownZero[BitWidth-ShiftAmt-1] || (HighBits & ~DemandedMask) == HighBits) { // Perform the logical shift right. Value *NewVal = BinaryOperator::CreateLShr( |
