summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorFangrui Song <maskray@google.com>2018-09-25 06:19:31 +0000
committerFangrui Song <maskray@google.com>2018-09-25 06:19:31 +0000
commit10a21625889ff788736b7f50a7dfe408b5ab62f7 (patch)
tree5b8354489dc16fef6b346d48dd5dbfc04b6b9cd9
parentadf5e0d91d10ebd45993b837e7f1eae54223a0d2 (diff)
downloadbcm5719-llvm-10a21625889ff788736b7f50a7dfe408b5ab62f7.tar.gz
bcm5719-llvm-10a21625889ff788736b7f50a7dfe408b5ab62f7.zip
Use unique_ptr to hold AsmInfo,MRI,MII,STI
Reviewers: pcc, dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52389 llvm-svn: 342945
-rw-r--r--llvm/include/llvm/Target/TargetMachine.h17
-rw-r--r--llvm/lib/CodeGen/LLVMTargetMachine.cpp10
-rw-r--r--llvm/lib/Target/BPF/BPFTargetMachine.cpp3
-rw-r--r--llvm/lib/Target/TargetMachine.cpp7
4 files changed, 16 insertions, 21 deletions
diff --git a/llvm/include/llvm/Target/TargetMachine.h b/llvm/include/llvm/Target/TargetMachine.h
index 1ca68c8df63..e743e9faa7e 100644
--- a/llvm/include/llvm/Target/TargetMachine.h
+++ b/llvm/include/llvm/Target/TargetMachine.h
@@ -84,11 +84,10 @@ protected: // Can only create subclasses.
CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
/// Contains target specific asm information.
- const MCAsmInfo *AsmInfo;
-
- const MCRegisterInfo *MRI;
- const MCInstrInfo *MII;
- const MCSubtargetInfo *STI;
+ std::unique_ptr<const MCAsmInfo> AsmInfo;
+ std::unique_ptr<const MCRegisterInfo> MRI;
+ std::unique_ptr<const MCInstrInfo> MII;
+ std::unique_ptr<const MCSubtargetInfo> STI;
unsigned RequireStructuredCFG : 1;
unsigned O0WantsFastISel : 1;
@@ -160,11 +159,11 @@ public:
void resetTargetOptions(const Function &F) const;
/// Return target specific asm information.
- const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
+ const MCAsmInfo *getMCAsmInfo() const { return AsmInfo.get(); }
- const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
- const MCInstrInfo *getMCInstrInfo() const { return MII; }
- const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
+ const MCRegisterInfo *getMCRegisterInfo() const { return MRI.get(); }
+ const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
+ const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }
/// If intrinsic information is available, return it. If not, return null.
virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 2cd389ce2c1..90337903008 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -40,14 +40,14 @@ static cl::opt<bool> EnableTrapUnreachable("trap-unreachable",
cl::desc("Enable generating trap for unreachable"));
void LLVMTargetMachine::initAsmInfo() {
- MRI = TheTarget.createMCRegInfo(getTargetTriple().str());
- MII = TheTarget.createMCInstrInfo();
+ MRI.reset(TheTarget.createMCRegInfo(getTargetTriple().str()));
+ MII.reset(TheTarget.createMCInstrInfo());
// FIXME: Having an MCSubtargetInfo on the target machine is a hack due
// to some backends having subtarget feature dependent module level
// code generation. This is similar to the hack in the AsmPrinter for
// module level assembly etc.
- STI = TheTarget.createMCSubtargetInfo(getTargetTriple().str(), getTargetCPU(),
- getTargetFeatureString());
+ STI.reset(TheTarget.createMCSubtargetInfo(
+ getTargetTriple().str(), getTargetCPU(), getTargetFeatureString()));
MCAsmInfo *TmpAsmInfo =
TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str());
@@ -71,7 +71,7 @@ void LLVMTargetMachine::initAsmInfo() {
if (Options.ExceptionModel != ExceptionHandling::None)
TmpAsmInfo->setExceptionsType(Options.ExceptionModel);
- AsmInfo = TmpAsmInfo;
+ AsmInfo.reset(TmpAsmInfo);
}
LLVMTargetMachine::LLVMTargetMachine(const Target &T,
diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
index ffcb1302533..52b1bb00316 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -70,7 +70,8 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT,
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
- BPFMCAsmInfo *MAI = static_cast<BPFMCAsmInfo *>(const_cast<MCAsmInfo *>(AsmInfo));
+ BPFMCAsmInfo *MAI =
+ static_cast<BPFMCAsmInfo *>(const_cast<MCAsmInfo *>(AsmInfo.get()));
MAI->setDwarfUsesRelocationsAcrossSections(!Subtarget.getUseDwarfRIS());
}
namespace {
diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp
index b3de6c10662..39d5705b2a5 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -40,12 +40,7 @@ TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) {
}
-TargetMachine::~TargetMachine() {
- delete AsmInfo;
- delete MRI;
- delete MII;
- delete STI;
-}
+TargetMachine::~TargetMachine() = default;
bool TargetMachine::isPositionIndependent() const {
return getRelocationModel() == Reloc::PIC_;
OpenPOWER on IntegriCloud