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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-11-26 17:02:02 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-11-26 17:02:02 +0000 |
| commit | 105fc1a5f3b98273acaf58a5738f590f7668af30 (patch) | |
| tree | 197b8f901583292df4dbc8a28c7bac002ee8aad0 | |
| parent | 6384d9ea313331b26cd2f0b250affef3bb3cfb41 (diff) | |
| download | bcm5719-llvm-105fc1a5f3b98273acaf58a5738f590f7668af30.tar.gz bcm5719-llvm-105fc1a5f3b98273acaf58a5738f590f7668af30.zip | |
AMDGPU: Don't optimize exec masks at -O0
llvm-svn: 347573
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index cdd3017e18d..2198ba8d6c0 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -880,7 +880,8 @@ void GCNPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) { void GCNPassConfig::addPostRegAlloc() { addPass(&SIFixVGPRCopiesID); - addPass(&SIOptimizeExecMaskingID); + if (getOptLevel() > CodeGenOpt::None) + addPass(&SIOptimizeExecMaskingID); TargetPassConfig::addPostRegAlloc(); } |
