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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-10-19 16:58:24 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-10-19 16:58:24 +0000
commit10213b90730e2459e6cbbeeb5c7289b18c298382 (patch)
treeb63ddb459889d811399b15ed92b563e4a35a01bc
parenta298964d22a203d21bafe1f649a46ba8a2592ca4 (diff)
downloadbcm5719-llvm-10213b90730e2459e6cbbeeb5c7289b18c298382.tar.gz
bcm5719-llvm-10213b90730e2459e6cbbeeb5c7289b18c298382.zip
[X86] Pulled out helper to decode target shuffle element sentinel values to 'Zeroable' known undef/zero bits. NFCI.
Renamed 'resolveTargetShuffleAndZeroables' to 'resolveTargetShuffleFromZeroables' to match. llvm-svn: 375348
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp35
1 files changed, 22 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1c9ee5d3ce6..b498a12aeae 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -6808,9 +6808,9 @@ static bool getTargetShuffleAndZeroables(SDValue N, SmallVectorImpl<int> &Mask,
}
// Replace target shuffle mask elements with known undef/zero sentinels.
-static void resolveTargetShuffleAndZeroables(SmallVectorImpl<int> &Mask,
- const APInt &KnownUndef,
- const APInt &KnownZero) {
+static void resolveTargetShuffleFromZeroables(SmallVectorImpl<int> &Mask,
+ const APInt &KnownUndef,
+ const APInt &KnownZero) {
unsigned NumElts = Mask.size();
assert(KnownUndef.getBitWidth() == NumElts &&
KnownZero.getBitWidth() == NumElts && "Shuffle mask size mismatch");
@@ -6823,6 +6823,22 @@ static void resolveTargetShuffleAndZeroables(SmallVectorImpl<int> &Mask,
}
}
+// Extract target shuffle mask sentinel elements to known undef/zero bitmasks.
+static void resolveZeroablesFromTargetShuffle(const SmallVectorImpl<int> &Mask,
+ APInt &KnownUndef,
+ APInt &KnownZero) {
+ unsigned NumElts = Mask.size();
+ KnownUndef = KnownZero = APInt::getNullValue(NumElts);
+
+ for (unsigned i = 0; i != NumElts; ++i) {
+ int M = Mask[i];
+ if (SM_SentinelUndef == M)
+ KnownUndef.setBit(i);
+ if (SM_SentinelZero == M)
+ KnownZero.setBit(i);
+ }
+}
+
// Forward declaration (for getFauxShuffleMask recursive check).
// TODO: Use DemandedElts variant.
static bool getTargetShuffleInputs(SDValue Op, SmallVectorImpl<SDValue> &Inputs,
@@ -7273,19 +7289,12 @@ static bool getTargetShuffleInputs(SDValue Op, const APInt &DemandedElts,
if (getTargetShuffleAndZeroables(Op, Mask, Inputs, KnownUndef, KnownZero)) {
if (ResolveKnownElts)
- resolveTargetShuffleAndZeroables(Mask, KnownUndef, KnownZero);
+ resolveTargetShuffleFromZeroables(Mask, KnownUndef, KnownZero);
return true;
}
if (getFauxShuffleMask(Op, DemandedElts, Mask, Inputs, DAG, Depth,
ResolveKnownElts)) {
- KnownUndef = KnownZero = APInt::getNullValue(Mask.size());
- for (int i = 0, e = Mask.size(); i != e; ++i) {
- int M = Mask[i];
- if (SM_SentinelUndef == M)
- KnownUndef.setBit(i);
- if (SM_SentinelZero == M)
- KnownZero.setBit(i);
- }
+ resolveZeroablesFromTargetShuffle(Mask, KnownUndef, KnownZero);
return true;
}
return false;
@@ -33047,7 +33056,7 @@ static SDValue combineX86ShufflesRecursively(
OpZero, DAG, Depth, false))
return SDValue();
- resolveTargetShuffleAndZeroables(OpMask, OpUndef, OpZero);
+ resolveTargetShuffleFromZeroables(OpMask, OpUndef, OpZero);
// Add the inputs to the Ops list, avoiding duplicates.
SmallVector<SDValue, 16> Ops(SrcOps.begin(), SrcOps.end());
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