diff options
author | Evan Cheng <evan.cheng@apple.com> | 2008-10-17 21:02:22 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2008-10-17 21:02:22 +0000 |
commit | 0fcc89b5966f5a5971f3edc89ab923e75841b426 (patch) | |
tree | 956b1f1408f7188b307dcdee481db6a367a83541 | |
parent | 010e9b07609465affb91b2cdf0626f21028679a4 (diff) | |
download | bcm5719-llvm-0fcc89b5966f5a5971f3edc89ab923e75841b426.tar.gz bcm5719-llvm-0fcc89b5966f5a5971f3edc89ab923e75841b426.zip |
Add implicit defs of XMM8 to XMM15 on 32-bit call instructions. While this is not technically true, it tells tblgen that these instructions "clobber" the entire XMM register file.
llvm-svn: 57723
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index f44b918438a..e23bc704b08 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -461,7 +461,8 @@ let isCall = 1 in // registers are added manually. let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, - XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS], + XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, + XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], Uses = [ESP] in { def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops), "call\t${dst:call}", []>; |