summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDiana Picus <diana.picus@linaro.org>2017-06-27 10:29:50 +0000
committerDiana Picus <diana.picus@linaro.org>2017-06-27 10:29:50 +0000
commit0e74a134f8578c0a3f8616bd3f2cde5a6131e07b (patch)
tree118b140e3bf944f96664fe1363b184573cf8aa7c
parent71d8b67bea64aef3f604396cf17a5533b2fcbc0b (diff)
downloadbcm5719-llvm-0e74a134f8578c0a3f8616bd3f2cde5a6131e07b.tar.gz
bcm5719-llvm-0e74a134f8578c0a3f8616bd3f2cde5a6131e07b.zip
[ARM] GlobalISel: Support G_SELECT for pointers
All we need to do is mark it as legal, otherwise it's just like s32. llvm-svn: 306390
-rw-r--r--llvm/lib/Target/ARM/ARMLegalizerInfo.cpp1
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir42
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll10
-rw-r--r--llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir27
4 files changed, 77 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 7ec7bab46a9..0b6738c2f63 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -85,6 +85,7 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
setAction({G_GEP, 1, s32}, Legal);
setAction({G_SELECT, s32}, Legal);
+ setAction({G_SELECT, p0}, Legal);
setAction({G_SELECT, 1, s1}, Legal);
setAction({G_CONSTANT, s32}, Legal);
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
index ab04b393f1a..6a1da0dfe85 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
@@ -42,7 +42,8 @@
define void @test_constant_imm() { ret void }
define void @test_constant_cimm() { ret void }
- define void @test_select() { ret void }
+ define void @test_select_s32() { ret void }
+ define void @test_select_ptr() { ret void }
define void @test_soft_fp_double() #0 { ret void }
@@ -1102,8 +1103,8 @@ body: |
BX_RET 14, _, implicit %r0
...
---
-name: test_select
-# CHECK-LABEL: name: test_select
+name: test_select_s32
+# CHECK-LABEL: name: test_select_s32
legalized: true
regBankSelected: true
selected: false
@@ -1137,6 +1138,41 @@ body: |
; CHECK: BX_RET 14, _, implicit %r0
...
---
+name: test_select_ptr
+# CHECK-LABEL: name: test_select_ptr
+legalized: true
+regBankSelected: true
+selected: false
+# CHECK: selected: true
+registers:
+ - { id: 0, class: gprb }
+ - { id: 1, class: gprb }
+ - { id: 2, class: gprb }
+ - { id: 3, class: gprb }
+body: |
+ bb.0:
+ liveins: %r0, %r1, %r2
+
+ %0(p0) = COPY %r0
+ ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
+
+ %1(p0) = COPY %r1
+ ; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
+
+ %2(s1) = COPY %r2
+ ; CHECK: [[VREGC:%[0-9]+]] = COPY %r2
+
+ %3(p0) = G_SELECT %2(s1), %0, %1
+ ; CHECK: CMPri [[VREGC]], 0, 14, _, implicit-def %cpsr
+ ; CHECK: [[RES:%[0-9]+]] = MOVCCr [[VREGX]], [[VREGY]], 0, %cpsr
+
+ %r0 = COPY %3(p0)
+ ; CHECK: %r0 = COPY [[RES]]
+
+ BX_RET 14, _, implicit %r0
+ ; CHECK: BX_RET 14, _, implicit %r0
+...
+---
name: test_soft_fp_double
# CHECK-LABEL: name: test_soft_fp_double
legalized: true
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
index 01b4bbdf9ad..4c498ff6ca9 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel.ll
@@ -410,3 +410,13 @@ entry:
%r = select i1 %cond, i32 %a, i32 %b
ret i32 %r
}
+
+define arm_aapcscc i32* @test_select_ptr(i32* %a, i32* %b, i1 %cond) {
+; CHECK-LABEL: test_select_ptr
+; CHECK: cmp r2, #0
+; CHECK: moveq r0, r1
+; CHECK: bx lr
+entry:
+ %r = select i1 %cond, i32* %a, i32* %b
+ ret i32* %r
+}
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
index 4cf83c3b45b..bf759728c36 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
+++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
@@ -40,6 +40,7 @@
define void @test_icmp_s32() { ret void }
define void @test_select_s32() { ret void }
+ define void @test_select_ptr() { ret void }
define void @test_fadd_s32() #0 { ret void }
define void @test_fadd_s64() #0 { ret void }
@@ -803,6 +804,32 @@ body: |
BX_RET 14, _, implicit %r0
...
---
+name: test_select_ptr
+# CHECK-LABEL: name: test_select_ptr
+legalized: false
+# CHECK: legalized: true
+regBankSelected: false
+selected: false
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+ - { id: 3, class: _ }
+body: |
+ bb.0:
+ liveins: %r0, %r1, %r2
+
+ %0(p0) = COPY %r0
+ %1(p0) = COPY %r1
+ %2(s1) = COPY %r2
+ %3(p0) = G_SELECT %2(s1), %0, %1
+ ; G_SELECT with p0 is legal, so we should find it unchanged in the output
+ ; CHECK: {{%[0-9]+}}(p0) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
+ %r0 = COPY %3(p0)
+ BX_RET 14, _, implicit %r0
+...
+---
name: test_fadd_s32
# CHECK-LABEL: name: test_fadd_s32
legalized: false
OpenPOWER on IntegriCloud