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author | Manman Ren <manman.ren@gmail.com> | 2015-04-29 20:03:38 +0000 |
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committer | Manman Ren <manman.ren@gmail.com> | 2015-04-29 20:03:38 +0000 |
commit | 0e20822887ca46a2b9b68a451191e9cae16b5772 (patch) | |
tree | 4de1533c1ee107797d0aef3268ce711417135066 | |
parent | 419bd0941514bad6fa9d66e6f76360791389e7e0 (diff) | |
download | bcm5719-llvm-0e20822887ca46a2b9b68a451191e9cae16b5772.tar.gz bcm5719-llvm-0e20822887ca46a2b9b68a451191e9cae16b5772.zip |
[AArch64] Refactor out codes that depend on specific CS save sequence.
No functionality change.
llvm-svn: 236143
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 47 |
1 files changed, 28 insertions, 19 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp index bd2af161210..6f133a35dce 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -250,6 +250,31 @@ void AArch64FrameLowering::emitCalleeSavedFrameMoves( } } +/// Get FPOffset by analyzing the first instruction. +static int getFPOffsetInPrologue(MachineInstr *MBBI) { + // First instruction must a) allocate the stack and b) have an immediate + // that is a multiple of -2. + assert(((MBBI->getOpcode() == AArch64::STPXpre || + MBBI->getOpcode() == AArch64::STPDpre) && + MBBI->getOperand(3).getReg() == AArch64::SP && + MBBI->getOperand(4).getImm() < 0 && + (MBBI->getOperand(4).getImm() & 1) == 0)); + + // Frame pointer is fp = sp - 16. Since the STPXpre subtracts the space + // required for the callee saved register area we get the frame pointer + // by addding that offset - 16 = -getImm()*8 - 2*8 = -(getImm() + 2) * 8. + int FPOffset = -(MBBI->getOperand(4).getImm() + 2) * 8; + assert(FPOffset >= 0 && "Bad Framepointer Offset"); + return FPOffset; +} + +static bool isCSSave(MachineInstr *MBBI) { + return MBBI->getOpcode() == AArch64::STPXi || + MBBI->getOpcode() == AArch64::STPDi || + MBBI->getOpcode() == AArch64::STPXpre || + MBBI->getOpcode() == AArch64::STPDpre; +} + void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB. MachineBasicBlock::iterator MBBI = MBB.begin(); @@ -300,27 +325,11 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { // Only set up FP if we actually need to. int FPOffset = 0; - if (HasFP) { - // First instruction must a) allocate the stack and b) have an immediate - // that is a multiple of -2. - assert((MBBI->getOpcode() == AArch64::STPXpre || - MBBI->getOpcode() == AArch64::STPDpre) && - MBBI->getOperand(3).getReg() == AArch64::SP && - MBBI->getOperand(4).getImm() < 0 && - (MBBI->getOperand(4).getImm() & 1) == 0); - - // Frame pointer is fp = sp - 16. Since the STPXpre subtracts the space - // required for the callee saved register area we get the frame pointer - // by addding that offset - 16 = -getImm()*8 - 2*8 = -(getImm() + 2) * 8. - FPOffset = -(MBBI->getOperand(4).getImm() + 2) * 8; - assert(FPOffset >= 0 && "Bad Framepointer Offset"); - } + if (HasFP) + FPOffset = getFPOffsetInPrologue(MBBI); // Move past the saves of the callee-saved registers. - while (MBBI->getOpcode() == AArch64::STPXi || - MBBI->getOpcode() == AArch64::STPDi || - MBBI->getOpcode() == AArch64::STPXpre || - MBBI->getOpcode() == AArch64::STPDpre) { + while (isCSSave(MBBI)) { ++MBBI; NumBytes -= 16; } |