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| author | Mihai Popa <mihail.popa@gmail.com> | 2013-08-13 14:02:13 +0000 |
|---|---|---|
| committer | Mihai Popa <mihail.popa@gmail.com> | 2013-08-13 14:02:13 +0000 |
| commit | 0e1012f0f450cabea83f18b25aeb545c96f5bc12 (patch) | |
| tree | 8925657752ba4df38cd55ebf16f0522021f50cf0 | |
| parent | 3fdabf8965c4beb868133a76fc4b07a7a0110fbd (diff) | |
| download | bcm5719-llvm-0e1012f0f450cabea83f18b25aeb545c96f5bc12.tar.gz bcm5719-llvm-0e1012f0f450cabea83f18b25aeb545c96f5bc12.zip | |
Fix signed overflow in when computing encodings for ADR instructions
llvm-svn: 188268
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/basic-arm-instructions.s | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp index 08732201b51..c0c21d3c857 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp @@ -671,7 +671,7 @@ getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, if (MO.isExpr()) return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_adr_pcrel_12, Fixups); - int32_t offset = MO.getImm(); + int64_t offset = MO.getImm(); uint32_t Val = 0x2000; int SoImmVal; diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s index ead2ce104eb..5d40a397660 100644 --- a/llvm/test/MC/ARM/basic-arm-instructions.s +++ b/llvm/test/MC/ARM/basic-arm-instructions.s @@ -153,7 +153,6 @@ Lforward: @ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2] @ CHECK: adr r1, #-2147483647 @ encoding: [0x06,0x11,0x8f,0xe2] - @------------------------------------------------------------------------------ @ ADD @------------------------------------------------------------------------------ @@ -187,6 +186,7 @@ Lforward: add r0, #-4 add r4, r5, #-21 + add r0, pc, #0xc0000000 @ CHECK: add r4, r5, #61440 @ encoding: [0x0f,0x4a,0x85,0xe2] @ CHECK: add r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe0] @@ -217,6 +217,7 @@ Lforward: @ CHECK: sub r0, r0, #4 @ encoding: [0x04,0x00,0x40,0xe2] @ CHECK: sub r4, r5, #21 @ encoding: [0x15,0x40,0x45,0xe2] +@ CHECK: adr r0, #-1073741824 @ encoding: [0x03,0x01,0x8f,0xe2] @ Test right shift by 32, which is encoded as 0 add r3, r1, r2, lsr #32 |
