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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2012-10-29 17:49:34 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2012-10-29 17:49:34 +0000 |
| commit | 0de4a1e4ae99d434804ed79bf8cf61b1236d9a57 (patch) | |
| tree | 77a8d2a30d389c1bb85d22560d33c4be8856c679 | |
| parent | 25c0ea8995950ba8f4c53cd3e8252f6cfb0947a7 (diff) | |
| download | bcm5719-llvm-0de4a1e4ae99d434804ed79bf8cf61b1236d9a57.tar.gz bcm5719-llvm-0de4a1e4ae99d434804ed79bf8cf61b1236d9a57.zip | |
Allow i32/i64 for 'f' constraint on PowerPC.
This fixes PR12757.
llvm-svn: 166943
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/pr12757.ll | 14 |
2 files changed, 16 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index de0d66124b1..cbb043cab80 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -6449,9 +6449,9 @@ PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, return std::make_pair(0U, &PPC::G8RCRegClass); return std::make_pair(0U, &PPC::GPRCRegClass); case 'f': - if (VT == MVT::f32) + if (VT == MVT::f32 || VT == MVT::i32) return std::make_pair(0U, &PPC::F4RCRegClass); - if (VT == MVT::f64) + if (VT == MVT::f64 || VT == MVT::i64) return std::make_pair(0U, &PPC::F8RCRegClass); break; case 'v': diff --git a/llvm/test/CodeGen/PowerPC/pr12757.ll b/llvm/test/CodeGen/PowerPC/pr12757.ll new file mode 100644 index 00000000000..c344656d298 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/pr12757.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i32 @__flt_rounds() nounwind { +entry: + %0 = tail call i64 asm sideeffect "mffs $0", "=f"() nounwind + %conv = trunc i64 %0 to i32 + ret i32 %conv +} + +; CHECK: @__flt_rounds +; CHECK: mffs + |
