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| author | Scott Michel <scottm@aero.org> | 2008-12-29 03:21:37 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-12-29 03:21:37 +0000 |
| commit | 0c9259f149d8168f4bfafa5a2757be58fbf49c0c (patch) | |
| tree | b03f4fc08e719d1eba1577411084d324bc303d8a | |
| parent | 4163213750112adbff1e369a843025d8816dcabf (diff) | |
| download | bcm5719-llvm-0c9259f149d8168f4bfafa5a2757be58fbf49c0c.tar.gz bcm5719-llvm-0c9259f149d8168f4bfafa5a2757be58fbf49c0c.zip | |
Teach LeaglizeDAG that i64 mul can be a libcall.
llvm-svn: 61463
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index d79f6bb1e1b..2c0d9ddcc1c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3281,6 +3281,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case ISD::MUL: if (VT == MVT::i32) LC = RTLIB::MUL_I32; + else if (VT == MVT::i64) + LC = RTLIB::MUL_I64; break; case ISD::FPOW: LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80, |
