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| author | Arnold Schwaighofer <arnolds@codeaurora.org> | 2012-08-13 19:54:01 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <arnolds@codeaurora.org> | 2012-08-13 19:54:01 +0000 |
| commit | 0bb7f23cfc9b7b27d45c6f3c4f75dd5850f98dbb (patch) | |
| tree | b075770b00b1ca65e71ca9c45f6b0ea35d43fbc0 | |
| parent | 9746b33e26957bdaafbaa956de444c0453abde2b (diff) | |
| download | bcm5719-llvm-0bb7f23cfc9b7b27d45c6f3c4f75dd5850f98dbb.tar.gz bcm5719-llvm-0bb7f23cfc9b7b27d45c6f3c4f75dd5850f98dbb.zip | |
[Hexagon] Don't mark callee saved registers as clobbered by a tail call
This was causing unnecessary spills/restores of callee saved registers.
Fixes PR13572.
Patch by Pranav Bhandarkar!
llvm-svn: 161778
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfo.td | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/simpletailcall.ll | 14 |
2 files changed, 17 insertions, 9 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.td b/llvm/lib/Target/Hexagon/HexagonInstrInfo.td index c7be5cea56e..c0c0df6004c 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.td @@ -2580,22 +2580,16 @@ let isCall = 1, neverHasSideEffects = 1, } // Tail Calls. -let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1, - Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, - R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in { +let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in { def TCRETURNtg : JInst<(outs), (ins calltarget:$dst), "jump $dst // TAILCALL", []>; } -let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1, - Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, - R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in { +let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in { def TCRETURNtext : JInst<(outs), (ins calltarget:$dst), "jump $dst // TAILCALL", []>; } -let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1, - Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, - R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in { +let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in { def TCRETURNR : JInst<(outs), (ins IntRegs:$dst), "jumpr $dst // TAILCALL", []>; } diff --git a/llvm/test/CodeGen/Hexagon/simpletailcall.ll b/llvm/test/CodeGen/Hexagon/simpletailcall.ll new file mode 100644 index 00000000000..287640489a5 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/simpletailcall.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; CHECK: foo_empty +; CHECK-NOT: allocframe +; CHECK-NOT: memd(r29 +; CHECK: jump bar_empty + +define void @foo_empty(i32 %h) nounwind { +entry: + %add = add nsw i32 %h, 3 + %call = tail call i32 bitcast (i32 (...)* @bar_empty to i32 (i32)*)(i32 %add) nounwind + ret void +} + +declare i32 @bar_empty(...) |
