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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-14 19:09:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-14 19:09:48 +0000 |
| commit | 0b864bb04322d06a6953f56befe415e29519cbf7 (patch) | |
| tree | 75c07b7d0342840913a6a034f17ff9fb69e752c9 | |
| parent | 37cd0dd26a973362e0539e9ab83d1cd501c1e4ac (diff) | |
| download | bcm5719-llvm-0b864bb04322d06a6953f56befe415e29519cbf7.tar.gz bcm5719-llvm-0b864bb04322d06a6953f56befe415e29519cbf7.zip | |
AMDGPU: Reduce number of registers in test
Once the failure this is testing is fixed, this would fail due to
using too many registers.
llvm-svn: 368901
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll b/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll index c81128646a8..e4d3df91d59 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll @@ -1,4 +1,4 @@ -; RUN: not llc -march=amdgcn -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s +; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s ; FIXME: This should be able to compile, but requires inserting an ; extra block to restore the scavenged register. @@ -109,8 +109,6 @@ entry: %sgpr99 = tail call i32 asm sideeffect "s_mov_b32 s99, 0", "={s99}"() #0 %sgpr100 = tail call i32 asm sideeffect "s_mov_b32 s100, 0", "={s100}"() #0 %sgpr101 = tail call i32 asm sideeffect "s_mov_b32 s101, 0", "={s101}"() #0 - %sgpr102 = tail call i32 asm sideeffect "s_mov_b32 s102, 0", "={s102}"() #0 - %sgpr103 = tail call i32 asm sideeffect "s_mov_b32 s103, 0", "={s103}"() #0 %vcc_lo = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_lo}"() #0 %vcc_hi = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={vcc_hi}"() #0 %cmp = icmp eq i32 %cnd, 0 @@ -228,8 +226,6 @@ bb3: tail call void asm sideeffect "; reg use $0", "{s99}"(i32 %sgpr99) #0 tail call void asm sideeffect "; reg use $0", "{s100}"(i32 %sgpr100) #0 tail call void asm sideeffect "; reg use $0", "{s101}"(i32 %sgpr101) #0 - tail call void asm sideeffect "; reg use $0", "{s102}"(i32 %sgpr102) #0 - tail call void asm sideeffect "; reg use $0", "{s103}"(i32 %sgpr103) #0 tail call void asm sideeffect "; reg use $0", "{vcc_lo}"(i32 %vcc_lo) #0 tail call void asm sideeffect "; reg use $0", "{vcc_hi}"(i32 %vcc_hi) #0 ret void |
