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authorDavide Italiano <davide@freebsd.org>2015-10-03 19:56:07 +0000
committerDavide Italiano <davide@freebsd.org>2015-10-03 19:56:07 +0000
commit0b6974bfe0407c1fa927b7ff476356d94e119f13 (patch)
treeeaa8c0fa280d716572f65da8f156af36268aa2a9
parentf0acbbfd966a52b059ea4c8a97eb218cb31543ec (diff)
downloadbcm5719-llvm-0b6974bfe0407c1fa927b7ff476356d94e119f13.tar.gz
bcm5719-llvm-0b6974bfe0407c1fa927b7ff476356d94e119f13.zip
[ELF/AArch64] Support R_AARCH64_ADR_PREL_PG_H121 relocation.
llvm-svn: 249246
-rw-r--r--lld/ELF/Target.cpp9
-rw-r--r--lld/test/elf2/aarch64-relocs.s14
2 files changed, 23 insertions, 0 deletions
diff --git a/lld/ELF/Target.cpp b/lld/ELF/Target.cpp
index 09f3b235aaf..6f153ee947b 100644
--- a/lld/ELF/Target.cpp
+++ b/lld/ELF/Target.cpp
@@ -267,6 +267,12 @@ static uint64_t AArch64GetPage(uint64_t Expr) {
return Expr & (~static_cast<uint64_t>(0xFFF));
}
+static void handle_ADD_ABS_LO12_NC(uint8_t *Location, uint64_t S, int64_t A) {
+ // No overflow check.
+ uint64_t X = ((S + A) & 0xFFF) << 10;
+ write32le(Location, read32le(Location) | X);
+}
+
static void handle_ADR_PREL_LO21(uint8_t *Location, uint64_t S, int64_t A,
uint64_t P) {
uint64_t X = S + A - P;
@@ -294,6 +300,9 @@ void AArch64TargetInfo::relocateOne(uint8_t *Buf, const void *RelP,
int64_t A = Rel.r_addend;
uint64_t P = BaseAddr + Rel.r_offset;
switch (Type) {
+ case R_AARCH64_ADD_ABS_LO12_NC:
+ handle_ADD_ABS_LO12_NC(Location, S, A);
+ break;
case R_AARCH64_ADR_PREL_LO21:
handle_ADR_PREL_LO21(Location, S, A, P);
break;
diff --git a/lld/test/elf2/aarch64-relocs.s b/lld/test/elf2/aarch64-relocs.s
index b28d5ea769c..f051946bd32 100644
--- a/lld/test/elf2/aarch64-relocs.s
+++ b/lld/test/elf2/aarch64-relocs.s
@@ -30,3 +30,17 @@ mystr:
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
# CHECK-NEXT: $x.2:
# CHECK-NEXT: 11012: 01 00 00 90 adrp x1, #0
+
+.section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits
+ add x0, x0, :lo12:.L.str
+.L.str:
+ .asciz "blah"
+ .size mystr, 4
+
+# S = 0x1101b, A = 0x4
+# R = (S + A) & 0xFFF = 0x1f
+# R << 10 = 0x7c00
+#
+# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
+# CHECK-NEXT: $x.4:
+# CHECK-NEXT: 1101b: 00 7c 00 91 add x0, x0, #31
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