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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-06 11:25:21 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-06 11:25:21 +0000 |
commit | 09eeb3a8b90affc07f31a84b6c766ec803fbfb31 (patch) | |
tree | 4b0dcf29957d36d5cf4eecdef16cfe7bca28ce88 | |
parent | 8a83f16ccd089224e7e84c0a1524296fccf61419 (diff) | |
download | bcm5719-llvm-09eeb3a8b90affc07f31a84b6c766ec803fbfb31.tar.gz bcm5719-llvm-09eeb3a8b90affc07f31a84b6c766ec803fbfb31.zip |
[X86][SandyBridge] Add (V)DPPS memory fold latencies
Noticed this during D44654
llvm-svn: 329389
-rw-r--r-- | llvm/lib/Target/X86/X86SchedSandyBridge.td | 14 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/avx-schedule.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/sse41-schedule.ll | 6 |
3 files changed, 19 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index a1df50c9414..7e27d27a196 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -1954,6 +1954,20 @@ def SBWriteResGroup120 : SchedWriteRes<[SBPort0,SBPort1,SBPort5,SBPort23]> { } def: InstRW<[SBWriteResGroup120], (instregex "(V?)DPPDrmi")>; +def SBWriteResGroup121 : SchedWriteRes<[SBPort0,SBPort1,SBPort5,SBPort23]> { + let Latency = 18; + let NumMicroOps = 5; + let ResourceCycles = [1,2,1,1]; +} +def: InstRW<[SBWriteResGroup121], (instregex "(V?)DPPSrmi")>; + +def SBWriteResGroup122 : SchedWriteRes<[SBPort0,SBPort1,SBPort5,SBPort23]> { + let Latency = 19; + let NumMicroOps = 5; + let ResourceCycles = [1,2,1,1]; +} +def: InstRW<[SBWriteResGroup122], (instregex "VDPPSYrmi")>; + def SBWriteResGroup123 : SchedWriteRes<[SBPort0,SBPort23,SBFPDivider]> { let Latency = 20; let NumMicroOps = 2; diff --git a/llvm/test/CodeGen/X86/avx-schedule.ll b/llvm/test/CodeGen/X86/avx-schedule.ll index 26af928b099..3ff64e03621 100644 --- a/llvm/test/CodeGen/X86/avx-schedule.ll +++ b/llvm/test/CodeGen/X86/avx-schedule.ll @@ -1607,13 +1607,13 @@ define <8 x float> @test_dpps(<8 x float> %a0, <8 x float> %a1, <8 x float> *%a2 ; GENERIC-LABEL: test_dpps: ; GENERIC: # %bb.0: ; GENERIC-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [12:2.00] -; GENERIC-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [8:1.00] +; GENERIC-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [19:2.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SANDY-LABEL: test_dpps: ; SANDY: # %bb.0: ; SANDY-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [12:2.00] -; SANDY-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [8:1.00] +; SANDY-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [19:2.00] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-LABEL: test_dpps: diff --git a/llvm/test/CodeGen/X86/sse41-schedule.ll b/llvm/test/CodeGen/X86/sse41-schedule.ll index b5a6e3613f6..43a1a1a540a 100644 --- a/llvm/test/CodeGen/X86/sse41-schedule.ll +++ b/llvm/test/CodeGen/X86/sse41-schedule.ll @@ -623,7 +623,7 @@ define <4 x float> @test_dpps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2 ; GENERIC-LABEL: test_dpps: ; GENERIC: # %bb.0: ; GENERIC-NEXT: dpps $7, %xmm1, %xmm0 # sched: [12:2.00] -; GENERIC-NEXT: dpps $7, (%rdi), %xmm0 # sched: [8:1.00] +; GENERIC-NEXT: dpps $7, (%rdi), %xmm0 # sched: [18:2.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SLM-LABEL: test_dpps: @@ -635,13 +635,13 @@ define <4 x float> @test_dpps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2 ; SANDY-SSE-LABEL: test_dpps: ; SANDY-SSE: # %bb.0: ; SANDY-SSE-NEXT: dpps $7, %xmm1, %xmm0 # sched: [12:2.00] -; SANDY-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [8:1.00] +; SANDY-SSE-NEXT: dpps $7, (%rdi), %xmm0 # sched: [18:2.00] ; SANDY-SSE-NEXT: retq # sched: [1:1.00] ; ; SANDY-LABEL: test_dpps: ; SANDY: # %bb.0: ; SANDY-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [12:2.00] -; SANDY-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [8:1.00] +; SANDY-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [18:2.00] ; SANDY-NEXT: retq # sched: [1:1.00] ; ; HASWELL-SSE-LABEL: test_dpps: |