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| author | Chris Lattner <sabre@nondot.org> | 2009-10-12 04:22:44 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-10-12 04:22:44 +0000 |
| commit | 0840c823e4b431e2405ec2fa12f619d37ae0f0f7 (patch) | |
| tree | a4776e0898c9ac1f35feee099860591d70f78541 | |
| parent | 40cf28d6ebe5e8e5cb70bb89ff59576d657bc120 (diff) | |
| download | bcm5719-llvm-0840c823e4b431e2405ec2fa12f619d37ae0f0f7.tar.gz bcm5719-llvm-0840c823e4b431e2405ec2fa12f619d37ae0f0f7.zip | |
Fix PR5087, patch by Jakub Staszak!
llvm-svn: 83822
| -rw-r--r-- | llvm/lib/CodeGen/MachineFunctionAnalysis.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp b/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp index ae9d5a99c04..56294d90398 100644 --- a/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp +++ b/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp @@ -30,6 +30,7 @@ MachineFunctionAnalysis::MachineFunctionAnalysis(TargetMachine &tm, } MachineFunctionAnalysis::~MachineFunctionAnalysis() { + releaseMemory(); assert(!MF && "MachineFunctionAnalysis left initialized!"); } diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index 6527dd70d92..f942f3f8510 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -587,8 +587,8 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, case TargetInstrInfo::INLINEASM: // We allow inline assembler nodes with empty bodies - they can // implicitly define registers, which is ok for JIT. - assert(MI.getOperand(0).getSymbolName()[0] == 0 && - "JIT does not support inline asm!"); + if (MI.getOperand(0).getSymbolName()[0]) + llvm_report_error("JIT does not support inline asm!"); break; case TargetInstrInfo::DBG_LABEL: case TargetInstrInfo::EH_LABEL: |
