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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-12 16:59:04 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-12 16:59:04 +0000 |
| commit | 07e1337c2a2383ea825494df48743c28715f3ab6 (patch) | |
| tree | a9ad8762644a99d6a7cf74880f92baed0e88edde | |
| parent | d5ae4e65014f4c72d7aa61c368084ce214488a32 (diff) | |
| download | bcm5719-llvm-07e1337c2a2383ea825494df48743c28715f3ab6.tar.gz bcm5719-llvm-07e1337c2a2383ea825494df48743c28715f3ab6.zip | |
[X86][AVX512] Add missing scheduling class tag for KMOVB/KMOVW/KMOVD/KMOVQ moves/loads/stores.
We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).
llvm-svn: 324905
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 3a1364243e1..05ab4df9b75 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -2735,13 +2735,15 @@ multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk, let hasSideEffects = 0, SchedRW = [WriteMove] in def kk : I<opc_kk, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), [], - IIC_SSE_MOVDQ>; + IIC_SSE_MOVDQ>, Sched<[WriteMove]>; def km : I<opc_km, MRMSrcMem, (outs KRC:$dst), (ins x86memop:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), - [(set KRC:$dst, (vvt (load addr:$src)))], IIC_SSE_MOVDQ>; + [(set KRC:$dst, (vvt (load addr:$src)))], IIC_SSE_MOVDQ>, + Sched<[WriteLoad]>; def mk : I<opc_mk, MRMDestMem, (outs), (ins x86memop:$dst, KRC:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), - [(store KRC:$src, addr:$dst)], IIC_SSE_MOVDQ>; + [(store KRC:$src, addr:$dst)], IIC_SSE_MOVDQ>, + Sched<[WriteStore]>; } multiclass avx512_mask_mov_gpr<bits<8> opc_kr, bits<8> opc_rk, |
