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author | Dan Gohman <gohman@apple.com> | 2008-12-23 17:28:50 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-12-23 17:28:50 +0000 |
commit | 072e52f1709ef803c899bb06153627a879ddac3e (patch) | |
tree | 80f74ffae65f3f12d0c4f9f6ee365e8fa7287b30 | |
parent | 92cf280dfb315be4a8c703c7803c45b795ae703b (diff) | |
download | bcm5719-llvm-072e52f1709ef803c899bb06153627a879ddac3e.tar.gz bcm5719-llvm-072e52f1709ef803c899bb06153627a879ddac3e.zip |
Use isTerminator() instead of isBranch()||isReturn() in
several places. isTerminator() returns true for a superset
of cases, and includes things like FP_REG_KILL, which are
nither return or branch but aren't safe to move/remat/etc.
llvm-svn: 61373
-rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 5 |
3 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 2f026018fa3..3825ddbb074 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -707,7 +707,7 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII, SawStore = true; return false; } - if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects()) + if (TID->isTerminator() || TID->hasUnmodeledSideEffects()) return false; // See if this instruction does a load. If so, we have to guarantee that the diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index f19862c47b2..d0baaa87ae1 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -205,7 +205,7 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { const TargetInstrDesc &TID = I.getDesc(); // Ignore stuff that we obviously can't hoist. - if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() || + if (TID.mayStore() || TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) return false; diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp index c3209006b97..c47dddaf189 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -275,8 +275,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() { // after stack slots are lowered to actual addresses. // TODO: Use an AliasAnalysis and do real alias-analysis queries, and // produce more precise dependence information. - if (TID.isCall() || TID.isReturn() || TID.isBranch() || - TID.hasUnmodeledSideEffects()) { + if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) { new_chain: // This is the conservative case. Add dependencies on all memory // references. @@ -300,7 +299,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() { // See if it is known to just have a single memory reference. MachineInstr *ChainMI = Chain->getInstr(); const TargetInstrDesc &ChainTID = ChainMI->getDesc(); - if (!ChainTID.isCall() && !ChainTID.isReturn() && !ChainTID.isBranch() && + if (!ChainTID.isCall() && !ChainTID.isTerminator() && !ChainTID.hasUnmodeledSideEffects() && ChainMI->hasOneMemOperand() && !ChainMI->memoperands_begin()->isVolatile() && |