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author | Etienne Bergeron <etienneb@google.com> | 2016-04-25 15:06:33 +0000 |
---|---|---|
committer | Etienne Bergeron <etienneb@google.com> | 2016-04-25 15:06:33 +0000 |
commit | 06c14ec31e738ba8cd7c87449389f3e5d0b4c5ea (patch) | |
tree | 859492bfbdabe2ff325e0e2981cd17285b774d0f | |
parent | edc82fe3ef21a036fee1e97dc687e88ad260f0f6 (diff) | |
download | bcm5719-llvm-06c14ec31e738ba8cd7c87449389f3e5d0b4c5ea.tar.gz bcm5719-llvm-06c14ec31e738ba8cd7c87449389f3e5d0b4c5ea.zip |
Fix incorrect redundant expression in target AMDGPU.
Summary:
The expression is detected as a redundant expression.
Turn out, this is probably a bug.
```
/home/etienneb/llvm/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:306:26: warning: both side of operator are equivalent [misc-redundant-expression]
if (isSMRD(*FirstLdSt) && isSMRD(*FirstLdSt)) {
```
Reviewers: rnk, tstellarAMD
Subscribers: arsenm, cfe-commits
Differential Revision: http://reviews.llvm.org/D19460
llvm-svn: 267415
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 2520291db78..ed98b27396b 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -303,7 +303,7 @@ bool SIInstrInfo::shouldClusterMemOps(MachineInstr *FirstLdSt, SecondDst = getNamedOperand(*SecondLdSt, AMDGPU::OpName::vdst); } - if (isSMRD(*FirstLdSt) && isSMRD(*FirstLdSt)) { + if (isSMRD(*FirstLdSt) && isSMRD(*SecondLdSt)) { FirstDst = getNamedOperand(*FirstLdSt, AMDGPU::OpName::sdst); SecondDst = getNamedOperand(*SecondLdSt, AMDGPU::OpName::sdst); } |