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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2013-06-03 14:42:40 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2013-06-03 14:42:40 +0000
commit05d53a018a6b8b641369410f86e90cce648a45ac (patch)
treedf247529181a1725b3bd4e54713970b05883fabf
parent213527d9c97e8dc5be69bfdd687864f4e08b8ed7 (diff)
downloadbcm5719-llvm-05d53a018a6b8b641369410f86e90cce648a45ac.tar.gz
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X86: sub_xmm registers are 128 bits wide.
llvm-svn: 183103
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index edf22ee1127..fbbb2575f65 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -25,7 +25,7 @@ let Namespace = "X86" in {
def sub_8bit_hi : SubRegIndex<8, 8>;
def sub_16bit : SubRegIndex<16>;
def sub_32bit : SubRegIndex<32>;
- def sub_xmm : SubRegIndex<64>;
+ def sub_xmm : SubRegIndex<128>;
}
//===----------------------------------------------------------------------===//
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