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| author | Andrew Trick <atrick@apple.com> | 2013-11-22 19:07:42 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-11-22 19:07:42 +0000 |
| commit | 059e800fdaf414725a3777c4a16fcb71c38bddf7 (patch) | |
| tree | ab89de93c347183fddeb2029842e041193606a45 | |
| parent | 3621b8a2174142d36bc189652b973977d7425343 (diff) | |
| download | bcm5719-llvm-059e800fdaf414725a3777c4a16fcb71c38bddf7.tar.gz bcm5719-llvm-059e800fdaf414725a3777c4a16fcb71c38bddf7.zip | |
DEBUG shouldEvict decisions
llvm-svn: 195490
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocBase.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocGreedy.cpp | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp index 293e306a291..2e433811f44 100644 --- a/llvm/lib/CodeGen/RegAllocBase.cpp +++ b/llvm/lib/CodeGen/RegAllocBase.cpp @@ -101,8 +101,8 @@ void RegAllocBase::allocatePhysRegs() { // register if possible and populate a list of new live intervals that // result from splitting. DEBUG(dbgs() << "\nselectOrSplit " - << MRI->getRegClass(VirtReg->reg)->getName() - << ':' << *VirtReg << '\n'); + << MRI->getRegClass(VirtReg->reg)->getName() + << ':' << *VirtReg << " w=" << VirtReg->weight << '\n'); typedef SmallVector<unsigned, 4> VirtRegVec; VirtRegVec SplitVRegs; unsigned AvailablePhysReg = selectOrSplit(*VirtReg, SplitVRegs); diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index ce3818a6c21..27dc07b54c9 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -548,7 +548,11 @@ bool RAGreedy::shouldEvict(LiveInterval &A, bool IsHint, if (CanSplit && IsHint && !BreaksHint) return true; - return A.weight > B.weight; + if (A.weight > B.weight) { + DEBUG(dbgs() << "should evict: " << B << " w= " << B.weight << '\n'); + return true; + } + return false; } /// canEvictInterference - Return true if all interferences between VirtReg and |
